ajouts suite a discussion avec Arthur

jfriedt
2 parents f6bcd3bdf4 324be9752a
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ifcs2018_poster.tex
@@ -72,12 +72,12 @@
 \setlength{\itemsep}{0pt}%
 \setlength{\parskip}{0pt}%
 \item
-{\bf Digital phase noise characterization}: flexibility (software defined local 
+{\bf Digital phase noise characterization}: flexibility (software defined local
 oscillator),\\ stability (no long term drift), reconfigurabilty
 $\Rightarrow$ {\bf software defined radio} oscillator \\
 phase noise characterization
 \item analog to digital conversion of radiofrequency signal, software
-defined local oscillator, 
+defined local oscillator,
 mixer and {\bf low pass filter}
 \item low pass filter uses most resources and introduces latency (phase delay
 in feedback loop): needs to be optimized
@@ -117,8 +117,8 @@
 \textbf{2. Alternative way (our focus):}\\
     Chain of small filters
     \begin{itemize}[label=$\Rightarrow$, noitemsep, nolistsep]
-      {\color{Green}\item Great rejection}
-      {\color{Green}\item Consume less resources on FPGA}
+      {\color{Green}\item Fewer resource consumption on FPGA}
+      {\color{Green}\item Greater rejection}
       {\color{Red}\item Harder way to design filter}
     \end{itemize}
 %  \end{enumerate}
@@ -129,7 +129,7 @@
  
   The 2\textsuperscript{nd} way could be considered as an optimization problem:
     \begin{itemize}[noitemsep,nolistsep]
-      \item One or many {\bf performance criteria} (rejection, noise, 
+      \item One or many {\bf performance criteria} (rejection, noise,
 throughput...)
       \item Limited {\bf resources} (area on FPGA) \hfill {\bf each FIR outputs} $y_n=\sum_{k=0}^{N_i} 
 \underbrace{b_{i_k}}_{c_i\mbox{ \footnotesize bits}}\times x_{n-k}$
@@ -143,7 +143,7 @@
 \vspace{.1cm}
 %\parbox{.60\linewidth}{
 %  \begin{enumerate}[noitemsep,nolistsep]
-%    \item 
+%    \item
 \noindent
 %    \item 
 %   \item
@@ -195,7 +195,7 @@
 {Criterion=max value of rejection}
   \end{minipage}
 \vspace{0.4cm}
-  \item {\bf Rejection}: the last configuration is better than the first but worse 
+  \item {\bf Rejection}: the last configuration is better than the first one but worse
 than the monolithic filter
   \item Resource {\bf consumption} assessed by {\bf synthesizing designs in Vivado} (2017): filter cascade uses less
 resources than a single monolithic filter (too large to fit in Zedboard's Zynq 7020)
...	...	@@ -72,12 +72,12 @@
72	72	\setlength{\itemsep}{0pt}%
73	73	\setlength{\parskip}{0pt}%
74	74	\item
75		-{\bf Digital phase noise characterization}: flexibility (software defined local
	75	+{\bf Digital phase noise characterization}: flexibility (software defined local
76	76	oscillator),\\ stability (no long term drift), reconfigurabilty
77	77	$\Rightarrow$ {\bf software defined radio} oscillator \\
78	78	phase noise characterization
79	79	\item analog to digital conversion of radiofrequency signal, software
80		-defined local oscillator,
	80	+defined local oscillator,
81	81	mixer and {\bf low pass filter}
82	82	\item low pass filter uses most resources and introduces latency (phase delay
83	83	in feedback loop): needs to be optimized
...	...	@@ -117,8 +117,8 @@
117	117	\textbf{2. Alternative way (our focus):}\\
118	118	Chain of small filters
119	119	\begin{itemize}[label=$\Rightarrow$, noitemsep, nolistsep]
120		- {\color{Green}\item Great rejection}
121		- {\color{Green}\item Consume less resources on FPGA}
	120	+ {\color{Green}\item Fewer resource consumption on FPGA}
	121	+ {\color{Green}\item Greater rejection}
122	122	{\color{Red}\item Harder way to design filter}
123	123	\end{itemize}
124	124	% \end{enumerate}
...	...	@@ -129,7 +129,7 @@
129	129
130	130	The 2\textsuperscript{nd} way could be considered as an optimization problem:
131	131	\begin{itemize}[noitemsep,nolistsep]
132		- \item One or many {\bf performance criteria} (rejection, noise,
	132	+ \item One or many {\bf performance criteria} (rejection, noise,
133	133	throughput...)
134	134	\item Limited {\bf resources} (area on FPGA) \hfill {\bf each FIR outputs} $y_n=\sum_{k=0}^{N_i}
135	135	\underbrace{b_{i_k}}_{c_i\mbox{ \footnotesize bits}}\times x_{n-k}$
...	...	@@ -143,7 +143,7 @@
143	143	\vspace{.1cm}
144	144	%\parbox{.60\linewidth}{
145	145	% \begin{enumerate}[noitemsep,nolistsep]
146		-% \item
	146	+% \item
147	147	\noindent
148	148	% \item
149	149	% \item
...	...	@@ -195,7 +195,7 @@
195	195	{Criterion=max value of rejection}
196	196	\end{minipage}
197	197	\vspace{0.4cm}
198		- \item {\bf Rejection}: the last configuration is better than the first but worse
	198	+ \item {\bf Rejection}: the last configuration is better than the first one but worse
199	199	than the monolithic filter
200	200	\item Resource {\bf consumption} assessed by {\bf synthesizing designs in Vivado} (2017): filter cascade uses less
201	201	resources than a single monolithic filter (too large to fit in Zedboard's Zynq 7020)