Ajout du tableau comparatif entre Fir compiler et Oscimp

Arthur HUGEAT
1 parent 7b5041458d
Showing 1 changed file with 25 additions and 6 deletions Side-by-side Diff
ifcs2018_journal.tex
@@ -120,7 +120,7 @@
 signals, High Level Synthesis (HLS) languages \cite{kasbah2008multigrid} are not considered but
 the problem is tackled at the Very-high-speed-integrated-circuit Hardware Description Language
 (VHDL) level.
-{\color{red}Since latency is not an issue in a openloop phase noise characterization instrument, 
+{\color{red}Since latency is not an issue in a openloop phase noise characterization instrument,
 the large
 numbre of taps in the FIR, as opposed to the shorter Infinite Impulse Response (IIR) filter,
 is not considered as an issue as would be in a closed loop system.}  % r2.4
@@ -144,7 +144,7 @@
 relation between number of fiter taps and quantization, Fig. \ref{float_vs_int} exhibits
 a 128-coefficient FIR bandpass filter designed using floating point numbers (blue). Upon
 quantization on 6~bit integers, 60 of the 128~coefficients in the beginning and end of the
-taps become null, {\color{red}making the large number of coefficients irrelevant: processing 
+taps become null, {\color{red}making the large number of coefficients irrelevant: processing
 resources % r1.1
 are hence saved by shrinking the filter length.} This tradeoff aimed at minimizing resources
 to reach a given rejection level, or maximizing out of band rejection for a given computational
  
@@ -197,10 +197,10 @@
  
 {\color{red}
 The first step of our approach is to model the DSP chain. Since we aim at only optimizing % r1.3
-the filtering part of the signal processing chain, we have not included the PRN generator or the 
-ADC in the model: the input data size and rate are considered fixed and defined by the hardware. 
+the filtering part of the signal processing chain, we have not included the PRN generator or the
+ADC in the model: the input data size and rate are considered fixed and defined by the hardware.
 The filtering can be done in two ways, either by considering a single monolithic FIR filter
-requiring many coefficients to reach the targeted noise rejection ratio, or by 
+requiring many coefficients to reach the targeted noise rejection ratio, or by
 cascading multiple FIR filters, each with fewer coefficients than found in the monolithic filter.}
  
 After each filter we leave the possibility of shifting the filtered data to consume
@@ -298,7 +298,7 @@
 Our criterion to compute the filter rejection considers
 % r2.8 et r2.2 r2.3
 the maximum magnitude within the stopband, to which the {\color{red}sum of the absolute values
-within the passband is subtracted to avoid filters with excessive ripples}. With this 
+within the passband is subtracted to avoid filters with excessive ripples}. With this
 criterion, we meet the expected rejection capability of low pass filters as shown in figure~\ref{fig:custom_criterion}.
  
 % \begin{figure}
@@ -1010,6 +1010,25 @@
 needed in the previous section. Indeed the worst time in this case is only 17~minutes,
 compared to 3~days in the previous section: this problem is more easily solved than the
 previous one.
+
+\renewcommand{\arraystretch}{1.2}
+\begin{table}
+\centering
+\caption{Resource consumption compared between the FIR Compiler from Xilinx and our FIR block}
+\label{tbl:area_time_comp}
+\begin{tabular}{|c|c|c|c|c|c|c|}
+\hline
+\multirow{2}{*}{} & \multicolumn{3}{c|}{Xilinx} & \multicolumn{3}{c|}{Our FIR block} \\ \cline{2-7}
+                  & LUT     & BRAM     & DSP    & LUT       & BRAM       & DSP       \\ \hline
+MAX/500           & 177     & 0        & 21     & 249       & 1          & 21        \\ \hline
+MAX/1000          & 306     & 0        & 37     & 453       & 1          & 37        \\ \hline
+MAX/1500          & 418     & 0        & 47     & 627       & 1          & 47        \\ \hline
+MIN/40            & 225     & 0        & 27     & 347       & 1          & 27        \\ \hline
+MIN/60            & 322     & 0        & 39     & 334       & 1          & 39        \\ \hline
+MIN/80            & 482     & 0        & 55     & 772       & 1          & 55        \\ \hline
+\end{tabular}
+\end{table}
+\renewcommand{\arraystretch}{1}
  
 \section{Conclusion}
...	...	@@ -120,7 +120,7 @@
120	120	signals, High Level Synthesis (HLS) languages \cite{kasbah2008multigrid} are not considered but
121	121	the problem is tackled at the Very-high-speed-integrated-circuit Hardware Description Language
122	122	(VHDL) level.
123		-{\color{red}Since latency is not an issue in a openloop phase noise characterization instrument,
	123	+{\color{red}Since latency is not an issue in a openloop phase noise characterization instrument,
124	124	the large
125	125	numbre of taps in the FIR, as opposed to the shorter Infinite Impulse Response (IIR) filter,
126	126	is not considered as an issue as would be in a closed loop system.} % r2.4
...	...	@@ -144,7 +144,7 @@
144	144	relation between number of fiter taps and quantization, Fig. \ref{float_vs_int} exhibits
145	145	a 128-coefficient FIR bandpass filter designed using floating point numbers (blue). Upon
146	146	quantization on 6~bit integers, 60 of the 128~coefficients in the beginning and end of the
147		-taps become null, {\color{red}making the large number of coefficients irrelevant: processing
	147	+taps become null, {\color{red}making the large number of coefficients irrelevant: processing
148	148	resources % r1.1
149	149	are hence saved by shrinking the filter length.} This tradeoff aimed at minimizing resources
150	150	to reach a given rejection level, or maximizing out of band rejection for a given computational
151	151
...	...	@@ -197,10 +197,10 @@
197	197
198	198	{\color{red}
199	199	The first step of our approach is to model the DSP chain. Since we aim at only optimizing % r1.3
200		-the filtering part of the signal processing chain, we have not included the PRN generator or the
201		-ADC in the model: the input data size and rate are considered fixed and defined by the hardware.
	200	+the filtering part of the signal processing chain, we have not included the PRN generator or the
	201	+ADC in the model: the input data size and rate are considered fixed and defined by the hardware.
202	202	The filtering can be done in two ways, either by considering a single monolithic FIR filter
203		-requiring many coefficients to reach the targeted noise rejection ratio, or by
	203	+requiring many coefficients to reach the targeted noise rejection ratio, or by
204	204	cascading multiple FIR filters, each with fewer coefficients than found in the monolithic filter.}
205	205
206	206	After each filter we leave the possibility of shifting the filtered data to consume
...	...	@@ -298,7 +298,7 @@
298	298	Our criterion to compute the filter rejection considers
299	299	% r2.8 et r2.2 r2.3
300	300	the maximum magnitude within the stopband, to which the {\color{red}sum of the absolute values
301		-within the passband is subtracted to avoid filters with excessive ripples}. With this
	301	+within the passband is subtracted to avoid filters with excessive ripples}. With this
302	302	criterion, we meet the expected rejection capability of low pass filters as shown in figure~\ref{fig:custom_criterion}.
303	303
304	304	% \begin{figure}
...	...	@@ -1010,6 +1010,25 @@
1010	1010	needed in the previous section. Indeed the worst time in this case is only 17~minutes,
1011	1011	compared to 3~days in the previous section: this problem is more easily solved than the
1012	1012	previous one.
	1013	+
	1014	+\renewcommand{\arraystretch}{1.2}
	1015	+\begin{table}
	1016	+\centering
	1017	+\caption{Resource consumption compared between the FIR Compiler from Xilinx and our FIR block}
	1018	+\label{tbl:area_time_comp}
	1019	+\begin{tabular}{\|c\|c\|c\|c\|c\|c\|c\|}
	1020	+\hline
	1021	+\multirow{2}{*}{} & \multicolumn{3}{c\|}{Xilinx} & \multicolumn{3}{c\|}{Our FIR block} \\ \cline{2-7}
	1022	+ & LUT & BRAM & DSP & LUT & BRAM & DSP \\ \hline
	1023	+MAX/500 & 177 & 0 & 21 & 249 & 1 & 21 \\ \hline
	1024	+MAX/1000 & 306 & 0 & 37 & 453 & 1 & 37 \\ \hline
	1025	+MAX/1500 & 418 & 0 & 47 & 627 & 1 & 47 \\ \hline
	1026	+MIN/40 & 225 & 0 & 27 & 347 & 1 & 27 \\ \hline
	1027	+MIN/60 & 322 & 0 & 39 & 334 & 1 & 39 \\ \hline
	1028	+MIN/80 & 482 & 0 & 55 & 772 & 1 & 55 \\ \hline
	1029	+\end{tabular}
	1030	+\end{table}
	1031	+\renewcommand{\arraystretch}{1}
1013	1032
1014	1033	\section{Conclusion}
1015	1034