relecture proceeding et corrections : regarder commentaires sur figure et phrase…

… que je ne comprends pas

relecture proceeding et corrections : regarder commentaires sur figure et phrase…
… que je ne comprends pas
jfriedt
1 parent 190924a53b
Showing 3 changed files with 2 additions and 2 deletions Side-by-side Diff
Makefile
ifcs2018_proceeding.tex
ifcs2018_processing.tex
@@ -4,7 +4,7 @@
 BIB = bibtex
 TARGET = ifcs2018
  
-all: $(TARGET)_abstract $(TARGET)_poster $(TARGET)_processing
+all: $(TARGET)_abstract $(TARGET)_poster $(TARGET)_proceeding
  
 view: $(TARGET)
 	evince $(TARGET).pdf
@@ -22,7 +22,7 @@
 	$(TEX) $@.tex
 	$(TEX) $@.tex
  
-$(TARGET)_processing: $(TARGET)_processing.tex references.bib
+$(TARGET)_proceeding: $(TARGET)_proceeding.tex references.bib
 	$(TEX) $@.tex
 	$(BIB) $@
 	$(TEX) $@.tex
+\documentclass[a4paper,conference]{IEEEtran/IEEEtran}
+\usepackage{graphicx,color,hyperref}
+\usepackage{amsfonts}
+\usepackage{url}
+\usepackage[normalem]{ulem}
+\graphicspath{{/home/jmfriedt/gpr/170324_avalanche/}{/home/jmfriedt/gpr/1705_homemade/}}
+% correct bad hyphenation here
+\hyphenation{op-tical net-works semi-conduc-tor}
+\textheight=26cm
+\setlength{\footskip}{30pt}
+\pagenumbering{gobble}
+\begin{document}
+\title{Filter optimization for real time digital processing of radiofrequency signals: application
+to oscillator metrology}
+
+\author{\IEEEauthorblockN{A. Hugeat\IEEEauthorrefmark{1}\IEEEauthorrefmark{2}, J. Bernard\IEEEauthorrefmark{2},
+G. Goavec-M\'erou\IEEEauthorrefmark{1},
+P.-Y. Bourgeois\IEEEauthorrefmark{1}, J.-M. Friedt\IEEEauthorrefmark{1}}
+\IEEEauthorblockA{\IEEEauthorrefmark{1}FEMTO-ST, Time \& Frequency department, Besan\c con, France }
+\IEEEauthorblockA{\IEEEauthorrefmark{2}FEMTO-ST, Computer Science department DISC, Besan\c con, France \\
+Email: \{pyb2,jmfriedt\}@femto-st.fr}
+}
+\maketitle
+\thispagestyle{plain}
+\pagestyle{plain}
+
+\begin{abstract}
+Software Defined Radio (SDR) provides stability, flexibility and reconfigurability to
+radiofrequency signal processing. Applied to oscillator characterization in the context
+of ultrastable clocks, stringent filtering requirements are defined by spurious signal or
+noise rejection needs. Since real time radiofrequency processing must be performed in a
+Field Programmable Array to meet timing constraints, we investigate optimization strategies
+to design filters meeting rejection characteristics while limiting the hardware resources
+required and keeping timing constraints within the targeted measurement bandwidths.
+\end{abstract}
+
+\begin{IEEEkeywords}
+Software Defined Radio, Mixed-Integer Linear Programming, Finite Impulse Response filter
+\end{IEEEkeywords}
+
+\section{Digital signal processing of ultrastable clock signals}
+
+Analog oscillator phase noise characteristics are classically performed by downconverting
+the radiofrequency signal using a saturated mixer to bring the radiofrequency signal to baseband,
+followed by a Fourier analysis of the beat signal to analyze phase fluctuations close to carrier. In
+a fully digital approach, the radiofrequency signal is digitized and numerically downconverted by
+multiplying the samples with a local numerically controlled oscillator (Fig. \ref{schema}) \cite{rsi}.
+
+\begin{figure}[h!tb]
+\begin{center}
+\includegraphics[width=.8\linewidth]{images/schema}
+\end{center}
+\caption{Fully digital oscillator phase noise characterization: the Device Under Test
+(DUT) signal is sampled by the radiofrequency grade Analog to Digital Converter (ADC) and
+downconverted by mixing with a Numerically Controlled Oscillator (NCO). Unwanted signals
+and noise aliases are rejected by a Low Pass Filter (LPF) implemented as a cascade of Finite
+Impulse Response (FIR) filters. The signal is then decimated before a Fourier analysis displays
+the spectral characteristics of the phase fluctuations.}
+\label{schema}
+\end{figure}
+
+As with the analog mixer,
+the non-linear behavior of the downconverter introduces noise or spurious signal aliasing as
+well as the generation of the frequency sum signal in addition to the frequency difference.
+These unwanted spectral characteristics must be rejected before decimating the data stream
+for the phase noise spectral characterization. The characteristics introduced between the downconverter
+and the decimation processing blocks are core characteristics of an oscillator characterization
+system, and must reject out-of-band signals below the targeted phase noise -- typically in the
+sub -170~dBc/Hz for ultrastable oscillator we aim at characterizing. The filter blocks will
+use most resources of the Field Programmable Gate Array (FPGA) used to process the radiofrequency
+datastream: optimizing the performance of the filter while reducing the needed resources is
+hence tackled in a systematic approach using optimization techniques. Most significantly, we
+tackle the issue by attempting to cascade multiple Finite Impulse Response (FIR) filters with
+tunable number of coefficients and tunable number of bits representing the coefficients and the
+data being processed.
+
+\section{Finite impulse response filter}
+
+We select FIR filter for their unconditional stability and ease of design. A FIR filter is defined
+by a set of weights $b_k$ applied to the inputs $x_k$ through a convolution to generate the outputs $y_k$
+$$y_n=\sum_{k=0}^N b_k x_{n-k}$$
+
+As opposed to an implementation on a general purpose processor in which word size is defined by the
+processor architecture, implementing such a filter on an FPGA offer more degrees of freedom since
+not only the coefficient values and number of taps must be defined, but also the number of bits defining
+the coefficients and the sample size.
+
+Ideally the coefficient are expressed as floating point value but this notation isn't a efficient way to
+work with FPGA. Instead we prefer convert this floating point values into integer values. However this
+conversion result in some precision loss. Actually as show figure \ref{float_vs_int}, we see that we aren't
+need too coefficients or too sample size. If we have lot of coefficients but a small sample size,
+the first and last are equal to zero. But if we have too sample size for few coefficients that not improve the quality.
+
+\begin{figure}[h!tb]
+\includegraphics[width=\linewidth]{images/float-vs-integer.pdf}
+\caption{Illistration of coefficients choice impact}
+\label{float_vs_int}
+\end{figure}
+
+\section{Filter optimization}
+
+A basic approach for implementing the FIR filter is to compute the transfer function of
+a monolithic filter: this single filter defines all coefficients with the same resolution
+(number of bits) and processes data represented with their own resolution. Meeting the
+filter shape requires a large number of coefficients, limited by resources of the FPGA since
+this filter must process data stream at the radiofrequency sampling rate after the mixer.
+
+An optimization problem \cite{leung2004handbook} aims at improving one or many
+performance criteria within a constrained resource environment. Amongst the tools
+developed to meet this aim, Mixed-Integer Linear Programming (MILP) provides the framework to
+provide a formal definition of the stated problem and search for an optimal use of available
+resources \cite{yu2007design, kodek1980design}.
+
+The degrees of freedom when addressing the problem of replacing the single monolithic
+FIR with a cascade of optimized filters are the number of coefficients $N_i$ of each filter $i$,
+the number of bits $c_i$ representing the coefficients and the number of bits $d_i$ representing
+the data fed to the filter. Because each FIR in the chain is fed the output of the previous stage,
+the optimization of the complete processing chain within a constrained resource environment is not
+trivial. The resource occupation of a FIR filter is considered as $c_i+d_i+\log_2(N_i)$ which is
+the number of bits needed in a worst case condition to represent the output of the FIR.
+
+
+\begin{figure}[h!tb]
+\includegraphics[width=\linewidth]{images/noise-rejection.pdf}
+\caption{Rejection as a function of number of coefficients and number of bits}
+\label{noise-rejection}
+\end{figure}
+
+The objective function maximizes the noise rejection while keeping resource occupation below
+a user-defined threshold. The MILP solver is allowed to choose the number of successive
+filters, within an upper bound. The last problem is to model the noise rejection. Since filter
+noise rejection capability is not modeled with linear equation, a look-up-table is generated
+for multiple filter configurations in which the $c_i$, $d_i$ and $N_i$ parameters are varied: for each
+one of these conditions, the low-pass filter rejection defined as the mean power between
+half the Nyquist frequency and the Nyquist frequency is stored as computed by the frequency response
+of the digital filter (Fig. \ref{noise-rejection}).
+
+Linear program formalism for solving the problem is well documented: an objective function is
+defined which is linearly dependent on the parameters to be optimized. Constraints are expressed
+as linear equation and solved using one of the available solvers, in our case GLPK\cite{glpk}.
+
+The MILP solver provides a solution to the problem by selecting a series of small FIR with
+increasing number of bits representing data and coefficients as well as an increasing number
+of coefficients, instead of a single monolithic filter. Fig. \ref{compare-fir} exhibits the
+performance comparison between one solution and a monolithic FIR when selecting a cutoff
+frequency of half the Nyquist frequency: a series of 5 FIR and a series of 10 FIR with the
+same space usage are provided as selected by the MILP solver. The FIR cascade provides improved
+rejection than the monolithic FIR at the expense of a lower cutoff frequency which remains to
+be tuned or compensated for.
+
+\begin{figure}[h!tb]
+% \includegraphics[width=\linewidth]{images/compare-fir.pdf}
+\includegraphics[width=\linewidth]{images/fir-mono-vs-fir-series-200dB.pdf}
+\caption{Comparison of the rejection capability between a series of FIR and a monolithic FIR
+with a cutoff frequency set at half the Nyquist frequency.}
+\label{compare-fir}
+\end{figure}
+
+The resource occupation when synthesizing such FIR on a Xilinx FPGA is summarized as Tab. \ref{t1}.
+
+\begin{table}[h!tb]
+\caption{Resource occupation on a Xilinx Zynq-7000 series FPGA when synthesizing the FIR cascade
+identified as optimal by the MILP solver within a finite resource criterion. The last line refers
+to available resources on a Zynq-7010 as found on the Redpitaya board. The rejection is the mean
+value from 0.6 to 1 Nyquist frequency.}
+\begin{center}
+\begin{tabular}{|c|cccc|}\hline
+FIR & BlockRAM & LookUpTables & DSP & rejection (dB)\\\hline\hline
+1 (monolithic) & 1 & 4064 & 40 & -72 \\
+5 & 5 & 12332 & 0 & -217 \\
+10 & 10 & 12717 & 0 & -251 \\\hline\hline
+Zynq 7010 & 60 & 17600 & 80 &  \\\hline
+\end{tabular}
+\end{center}
+%\vspace{-0.7cm}
+\label{t1}
+\end{table}
+
+\section{Filter coefficient selection}
+
+The coefficients of a single monolithic filter are computed as the impulse response
+of the filter transfer function, and practically approximated by a multitude of methods
+including least square optimization (Matlab's {\tt firls} function), Hamming or Kaiser windowing
+(Matlab's {\tt fir1} function). Cascading filters opens a new optimization opportunity by
+selecting various coefficient sets depending on the number of coefficients. Fig. \ref{2}
+illustrates that for a number of coefficients ranging from 8 to 47, {\tt fir1} provides a better
+rejection than {\tt firls}: since the linear solver increases the number of coefficients along
+the processing chain, the type of selected filter also changes depending on the number of coefficients
+and evolves along the processing chain.
+
+\begin{figure}[h!tb]
+\includegraphics[width=\linewidth]{images/fir1-vs-firls}
+\caption{Evolution of the rejection capability of least-square optimized filters and Hamming
+FIR filters as a function of the number of coefficients, for floating point numbers and 8-bit
+encoded integers.}
+\label{2}
+\end{figure}
+
+\section{Conclusion}
+
+We address the optimization problem of designing a low-pass filter chain in a Field Programmable Gate
+Array for improved noise rejection within constrained resource occupation, as needed for
+real time processing of radiofrequency signal when characterizing spectral phase noise
+characteristics of stable oscillators. The flexibility of the digital approach makes the result
+best suited for closing the loop and using the measurement output in a feedback loop for
+controlling clocks, e.g. in a quartz-stabilized high performance clock whose long term behavior
+is controlled by non-piezoelectric resonator (sapphire resonator, microwave or optical
+atomic transition).
+
+\section*{Acknowledgement}
+
+This work is supported by the ANR Programme d'Investissement d'Avenir in
+progress at the Time and Frequency Departments of the FEMTO-ST Institute
+(Oscillator IMP, First-TF and Refimeve+), and by R\'egion de Franche-Comt\'e.
+The authors would like to thank E. Rubiola, F. Vernotte, G. Cabodevila for support and
+fruitful discussions.
+
+\bibliographystyle{IEEEtran}
+\bibliography{references}
+\end{document}
-\documentclass[a4paper,conference]{IEEEtran/IEEEtran}
-\usepackage{graphicx,color,hyperref}
-\usepackage{amsfonts}
-\usepackage{url}
-\usepackage[normalem]{ulem}
-\graphicspath{{/home/jmfriedt/gpr/170324_avalanche/}{/home/jmfriedt/gpr/1705_homemade/}}
-% correct bad hyphenation here
-\hyphenation{op-tical net-works semi-conduc-tor}
-\textheight=26cm
-\setlength{\footskip}{30pt}
-\pagenumbering{gobble}
-\begin{document}
-\title{Filter optimization for real time digital processing of radiofrequency signals: application
-to oscillator metrology}
-
-\author{\IEEEauthorblockN{A. Hugeat\IEEEauthorrefmark{1}\IEEEauthorrefmark{2}, J. Bernard\IEEEauthorrefmark{2},
-G. Goavec-M\'erou\IEEEauthorrefmark{1},
-P.-Y. Bourgeois\IEEEauthorrefmark{1}, J.-M. Friedt\IEEEauthorrefmark{1}}
-\IEEEauthorblockA{\IEEEauthorrefmark{1}FEMTO-ST, Time \& Frequency department, Besan\c con, France }
-\IEEEauthorblockA{\IEEEauthorrefmark{2}FEMTO-ST, Computer Science department DISC, Besan\c con, France \\
-Email: \{pyb2,jmfriedt\}@femto-st.fr}
-}
-\maketitle
-\thispagestyle{plain}
-\pagestyle{plain}
-
-\begin{abstract}
-Software Defined Radio (SDR) provides stability, flexibility and reconfigurability to
-radiofrequency signal processing. Applied to oscillator characterization in the context
-of ultrastable clocks, stringent filtering requirements are defined by spurious signal or
-noise rejection needs. Since real time radiofrequency processing must be performed in a
-Field Programmable Array to meet timing constraints, we investigate optimization strategies
-to design filters meeting rejection characteristics while limiting the hardware resources
-required and keeping timing constraints within the targeted measurement bandwidths.
-\end{abstract}
-
-\begin{IEEEkeywords}
-Software Defined Radio, Mixed-Integer Linear Programming, Finite Impulse Response filter
-\end{IEEEkeywords}
-
-\section{Digital signal processing of ultrastable clock signals}
-
-Analog oscillator phase noise characteristics are classically performed by downconverting
-the radiofrequency signal using a saturated mixer to bring the radiofrequency signal to baseband,
-followed by a Fourier analysis of the beat signal to analyze phase fluctuations close to carrier. In
-a fully digital approach, the radiofrequency signal is digitized and numerically downconverted by
-multiplying the samples with a local numerically controlled oscillator (Fig. \ref{schema}) \cite{rsi}.
-
-\begin{figure}[h!tb]
-\begin{center}
-\includegraphics[width=.8\linewidth]{images/schema}
-\end{center}
-\caption{Fully digital oscillator phase noise characterization: the Device Under Test
-(DUT) signal is sampled by the radiofrequency grade Analog to Digital Converter (ADC) and
-downconverted by mixing with a Numerically Controlled Oscillator (NCO). Unwanted signals
-and noise aliases are rejected by a Low Pass Filter (LPF) implemented as a cascade of Finite
-Impulse Response (FIR) filters. The signal is then decimated before a Fourier analysis displays
-the spectral characteristics of the phase fluctuations.}
-\label{schema}
-\end{figure}
-
-As with the analog mixer,
-the non-linear behavior of the downconverter introduces noise or spurious signal aliasing as
-well as the generation of the frequency sum signal in addition to the frequency difference.
-These unwanted spectral characteristics must be rejected before decimating the data stream
-for the phase noise spectral characterization. The characteristics introduced between the downconverter
-and the decimation processing blocks are core characteristics of an oscillator characterization
-system, and must reject out-of-band signals below the targeted phase noise -- typically in the
-sub -170~dBc/Hz for ultrastable oscillator we aim at characterizing. The filter blocks will
-use most resources of the Field Programmable Gate Array (FPGA) used to process the radiofrequency
-datastream: optimizing the performance of the filter while reducing the needed resources is
-hence tackled in a systematic approach using optimization techniques. Most significantly, we
-tackle the issue by attempting to cascade multiple Finite Impulse Response (FIR) filters with
-tunable number of coefficients and tunable number of bits representing the coefficients and the
-data being processed.
-
-\section{Finite impulse response filter}
-
-We select FIR filter for their unconditional stability and ease of design. A FIR filter is defined
-by a set of weights $b_k$ applied to the inputs $x_k$ through a convolution to generate the outputs $y_k$
-$$y_n=\sum_{k=0}^N b_k x_{n-k}$$
-
-As opposed to an implementation on a general purpose processor in which word size is defined by the
-processor architecture, implementing such a filter on an FPGA offer more degrees of freedom since
-not only the coefficient values and number of taps must be defined, but also the number of bits defining
-the coefficients and the sample size.
-
-Ideally the coefficient are expressed as floating point value but this notation isn't a efficient way to
-work with FPGA. Instead we prefer convert this floating point values into integer values. However this
-conversion result in some precision loss. Actually as show figure \ref{float_vs_int}, we see that we aren't
-need too coefficients or too sample size. If we have lot of coefficients but a small sample size,
-the first and last are equal to zero. But if we have too sample size for few coefficients that not improve the quality.
-
-\begin{figure}[h!tb]
-\includegraphics[width=\linewidth]{images/float-vs-integer.pdf}
-\caption{Illistration of coefficients choice impact}
-\label{float_vs_int}
-\end{figure}
-
-\section{Filter optimization}
-
-A basic approach for implementing the FIR filter is to compute the transfer function of
-a monolithic filter: this single filter defines all coefficients with the same resolution
-(number of bits) and processes data represented with their own resolution. Meeting the
-filter shape requires a large number of coefficients, limited by resources of the FPGA since
-this filter must process data stream at the radiofrequency sampling rate after the mixer.
-
-An optimization problem \cite{leung2004handbook} aims at improving one or many
-performance criteria within a constrained resource environment. Amongst the tools
-developed to meet this aim, Mixed-Integer Linear Programming (MILP) provides the framework to
-provide a formal definition of the stated problem and search for an optimal use of available
-resources \cite{yu2007design, kodek1980design}.
-
-The degrees of freedom when addressing the problem of replacing the single monolithic
-FIR with a cascade of optimized filters are the number of coefficients $N_i$ of each filter $i$,
-the number of bits $c_i$ representing the coefficients and the number of bits $d_i$ representing
-the data fed to the filter. Because each FIR in the chain is fed the output of the previous stage,
-the optimization of the complete processing chain within a constrained resource environment is not
-trivial. The resource occupation of a FIR filter is considered as $c_i+d_i+\log_2(N_i)$ which is
-the number of bits needed in a worst case condition to represent the output of the FIR.
-
-
-\begin{figure}[h!tb]
-\includegraphics[width=\linewidth]{images/noise-rejection.pdf}
-\caption{Rejection as a function of number of coefficients and number of bits}
-\label{noise-rejection}
-\end{figure}
-
-The objective function maximizes the noise rejection while keeping resource occupation below
-a user-defined threshold. The MILP solver is allowed to choose the number of successive
-filters, within an upper bound. The last problem is to model the noise rejection. Since filter
-noise rejection capability is not modeled with linear equation, a look-up-table is generated
-for multiple filter configurations in which the $c_i$, $d_i$ and $N_i$ parameters are varied: for each
-one of these conditions, the low-pass filter rejection defined as the mean power between
-half the Nyquist frequency and the Nyquist frequency is stored as computed by the frequency response
-of the digital filter (Fig. \ref{noise-rejection}).
-
-Linear program formalism for solving the problem is well documented: an objective function is
-defined which is linearly dependent on the parameters to be optimized. Constraints are expressed
-as linear equation and solved using one of the available solvers, in our case GLPK\cite{glpk}.
-
-The MILP solver provides a solution to the problem by selecting a series of small FIR with
-increasing number of bits representing data and coefficients as well as an increasing number
-of coefficients, instead of a single monolithic filter. Fig. \ref{compare-fir} exhibits the
-performance comparison between one solution and a monolithic FIR when selecting a cutoff
-frequency of half the Nyquist frequency: a series of 5 FIR and a series of 10 FIR with the
-same space usage are provided as selected by the MILP solver. The FIR cascade provides improved
-rejection than the monolithic FIR at the expense of a lower cutoff frequency which remains to
-be tuned or compensated for.
-
-\begin{figure}[h!tb]
-% \includegraphics[width=\linewidth]{images/compare-fir.pdf}
-\includegraphics[width=\linewidth]{images/fir-mono-vs-fir-series-200dB.pdf}
-\caption{Comparison of the rejection capability between a series of FIR and a monolithic FIR
-with a cutoff frequency set at half the Nyquist frequency.}
-\label{compare-fir}
-\end{figure}
-
-The resource occupation when synthesizing such FIR on a Xilinx FPGA is summarized as Tab. \ref{t1}.
-
-\begin{table}[h!tb]
-\caption{Resource occupation on a Xilinx Zynq-7000 series FPGA when synthesizing the FIR cascade
-identified as optimal by the MILP solver within a finite resource criterion. The last line refers
-to available resources on a Zynq-7010 as found on the Redpitaya board. The rejection is the mean
-value from 0.6 to 1 Nyquist frequency.}
-\begin{center}
-\begin{tabular}{|c|cccc|}\hline
-FIR & BlockRAM & LookUpTables & DSP & rejection (dB)\\\hline\hline
-1 (monolithic) & 1 & 4064 & 40 & -72 \\
-5 & 5 & 12332 & 0 & -217 \\
-10 & 10 & 12717 & 0 & -251 \\\hline\hline
-Zynq 7010 & 60 & 17600 & 80 &  \\\hline
-\end{tabular}
-\end{center}
-%\vspace{-0.7cm}
-\label{t1}
-\end{table}
-
-\section{Filter coefficient selection}
-
-The coefficients of a single monolithic filter are computed as the impulse response
-of the filter transfer function, and practically approximated by a multitude of methods
-including least square optimization (Matlab's {\tt firls} function), Hamming or Kaiser windowing
-(Matlab's {\tt fir1} function). Cascading filters opens a new optimization opportunity by
-selecting various coefficient sets depending on the number of coefficients. Fig. \ref{2}
-illustrates that for a number of coefficients ranging from 8 to 47, {\tt fir1} provides a better
-rejection than {\tt firls}: since the linear solver increases the number of coefficients along
-the processing chain, the type of selected filter also changes depending on the number of coefficients
-and evolves along the processing chain.
-
-\begin{figure}[h!tb]
-\includegraphics[width=\linewidth]{images/fir1-vs-firls}
-\caption{Evolution of the rejection capability of least-square optimized filters and Hamming
-FIR filters as a function of the number of coefficients, for floating point numbers and 8-bit
-encoded integers.}
-\label{2}
-\end{figure}
-
-\section{Conclusion}
-
-We address the optimization problem of designing a low-pass filter chain in a Field Programmable Gate
-Array for improved noise rejection within constrained resource occupation, as needed for
-real time processing of radiofrequency signal when characterizing spectral phase noise
-characteristics of stable oscillators. The flexibility of the digital approach makes the result
-best suited for closing the loop and using the measurement output in a feedback loop for
-controlling clocks, e.g. in a quartz-stabilized high performance clock whose long term behavior
-is controlled by non-piezoelectric resonator (sapphire resonator, microwave or optical
-atomic transition).
-
-\section*{Acknowledgement}
-
-This work is supported by the ANR Programme d'Investissement d'Avenir in
-progress at the Time and Frequency Departments of the FEMTO-ST Institute
-(Oscillator IMP, First-TF and Refimeve+), and by R\'egion de Franche-Comt\'e.
-The authors would like to thank E. Rubiola, F. Vernotte, G. Cabodevila for support and
-fruitful discussions.
-
-\bibliographystyle{IEEEtran}
-\bibliography{references}
-\end{document}
...	...	@@ -4,7 +4,7 @@
4	4	BIB = bibtex
5	5	TARGET = ifcs2018
6	6
7		-all: $(TARGET)_abstract $(TARGET)_poster $(TARGET)_processing
	7	+all: $(TARGET)_abstract $(TARGET)_poster $(TARGET)_proceeding
8	8
9	9	view: $(TARGET)
10	10	evince $(TARGET).pdf
...	...	@@ -22,7 +22,7 @@
22	22	$(TEX) $@.tex
23	23	$(TEX) $@.tex
24	24
25		-$(TARGET)_processing: $(TARGET)_processing.tex references.bib
	25	+$(TARGET)_proceeding: $(TARGET)_proceeding.tex references.bib
26	26	$(TEX) $@.tex
27	27	$(BIB) $@
28	28	$(TEX) $@.tex
	1	+\documentclass[a4paper,conference]{IEEEtran/IEEEtran}
	2	+\usepackage{graphicx,color,hyperref}
	3	+\usepackage{amsfonts}
	4	+\usepackage{url}
	5	+\usepackage[normalem]{ulem}
	6	+\graphicspath{{/home/jmfriedt/gpr/170324_avalanche/}{/home/jmfriedt/gpr/1705_homemade/}}
	7	+% correct bad hyphenation here
	8	+\hyphenation{op-tical net-works semi-conduc-tor}
	9	+\textheight=26cm
	10	+\setlength{\footskip}{30pt}
	11	+\pagenumbering{gobble}
	12	+\begin{document}
	13	+\title{Filter optimization for real time digital processing of radiofrequency signals: application
	14	+to oscillator metrology}
	15	+
	16	+\author{\IEEEauthorblockN{A. Hugeat\IEEEauthorrefmark{1}\IEEEauthorrefmark{2}, J. Bernard\IEEEauthorrefmark{2},
	17	+G. Goavec-M\'erou\IEEEauthorrefmark{1},
	18	+P.-Y. Bourgeois\IEEEauthorrefmark{1}, J.-M. Friedt\IEEEauthorrefmark{1}}
	19	+\IEEEauthorblockA{\IEEEauthorrefmark{1}FEMTO-ST, Time \& Frequency department, Besan\c con, France }
	20	+\IEEEauthorblockA{\IEEEauthorrefmark{2}FEMTO-ST, Computer Science department DISC, Besan\c con, France \\
	21	+Email: \{pyb2,jmfriedt\}@femto-st.fr}
	22	+}
	23	+\maketitle
	24	+\thispagestyle{plain}
	25	+\pagestyle{plain}
	26	+
	27	+\begin{abstract}
	28	+Software Defined Radio (SDR) provides stability, flexibility and reconfigurability to
	29	+radiofrequency signal processing. Applied to oscillator characterization in the context
	30	+of ultrastable clocks, stringent filtering requirements are defined by spurious signal or
	31	+noise rejection needs. Since real time radiofrequency processing must be performed in a
	32	+Field Programmable Array to meet timing constraints, we investigate optimization strategies
	33	+to design filters meeting rejection characteristics while limiting the hardware resources
	34	+required and keeping timing constraints within the targeted measurement bandwidths.
	35	+\end{abstract}
	36	+
	37	+\begin{IEEEkeywords}
	38	+Software Defined Radio, Mixed-Integer Linear Programming, Finite Impulse Response filter
	39	+\end{IEEEkeywords}
	40	+
	41	+\section{Digital signal processing of ultrastable clock signals}
	42	+
	43	+Analog oscillator phase noise characteristics are classically performed by downconverting
	44	+the radiofrequency signal using a saturated mixer to bring the radiofrequency signal to baseband,
	45	+followed by a Fourier analysis of the beat signal to analyze phase fluctuations close to carrier. In
	46	+a fully digital approach, the radiofrequency signal is digitized and numerically downconverted by
	47	+multiplying the samples with a local numerically controlled oscillator (Fig. \ref{schema}) \cite{rsi}.
	48	+
	49	+\begin{figure}[h!tb]
	50	+\begin{center}
	51	+\includegraphics[width=.8\linewidth]{images/schema}
	52	+\end{center}
	53	+\caption{Fully digital oscillator phase noise characterization: the Device Under Test
	54	+(DUT) signal is sampled by the radiofrequency grade Analog to Digital Converter (ADC) and
	55	+downconverted by mixing with a Numerically Controlled Oscillator (NCO). Unwanted signals
	56	+and noise aliases are rejected by a Low Pass Filter (LPF) implemented as a cascade of Finite
	57	+Impulse Response (FIR) filters. The signal is then decimated before a Fourier analysis displays
	58	+the spectral characteristics of the phase fluctuations.}
	59	+\label{schema}
	60	+\end{figure}
	61	+
	62	+As with the analog mixer,
	63	+the non-linear behavior of the downconverter introduces noise or spurious signal aliasing as
	64	+well as the generation of the frequency sum signal in addition to the frequency difference.
	65	+These unwanted spectral characteristics must be rejected before decimating the data stream
	66	+for the phase noise spectral characterization. The characteristics introduced between the downconverter
	67	+and the decimation processing blocks are core characteristics of an oscillator characterization
	68	+system, and must reject out-of-band signals below the targeted phase noise -- typically in the
	69	+sub -170~dBc/Hz for ultrastable oscillator we aim at characterizing. The filter blocks will
	70	+use most resources of the Field Programmable Gate Array (FPGA) used to process the radiofrequency
	71	+datastream: optimizing the performance of the filter while reducing the needed resources is
	72	+hence tackled in a systematic approach using optimization techniques. Most significantly, we
	73	+tackle the issue by attempting to cascade multiple Finite Impulse Response (FIR) filters with
	74	+tunable number of coefficients and tunable number of bits representing the coefficients and the
	75	+data being processed.
	76	+
	77	+\section{Finite impulse response filter}
	78	+
	79	+We select FIR filter for their unconditional stability and ease of design. A FIR filter is defined
	80	+by a set of weights $b_k$ applied to the inputs $x_k$ through a convolution to generate the outputs $y_k$
	81	+$$y_n=\sum_{k=0}^N b_k x_{n-k}$$
	82	+
	83	+As opposed to an implementation on a general purpose processor in which word size is defined by the
	84	+processor architecture, implementing such a filter on an FPGA offer more degrees of freedom since
	85	+not only the coefficient values and number of taps must be defined, but also the number of bits defining
	86	+the coefficients and the sample size.
	87	+
	88	+Ideally the coefficient are expressed as floating point value but this notation isn't a efficient way to
	89	+work with FPGA. Instead we prefer convert this floating point values into integer values. However this
	90	+conversion result in some precision loss. Actually as show figure \ref{float_vs_int}, we see that we aren't
	91	+need too coefficients or too sample size. If we have lot of coefficients but a small sample size,
	92	+the first and last are equal to zero. But if we have too sample size for few coefficients that not improve the quality.
	93	+
	94	+\begin{figure}[h!tb]
	95	+\includegraphics[width=\linewidth]{images/float-vs-integer.pdf}
	96	+\caption{Illistration of coefficients choice impact}
	97	+\label{float_vs_int}
	98	+\end{figure}
	99	+
	100	+\section{Filter optimization}
	101	+
	102	+A basic approach for implementing the FIR filter is to compute the transfer function of
	103	+a monolithic filter: this single filter defines all coefficients with the same resolution
	104	+(number of bits) and processes data represented with their own resolution. Meeting the
	105	+filter shape requires a large number of coefficients, limited by resources of the FPGA since
	106	+this filter must process data stream at the radiofrequency sampling rate after the mixer.
	107	+
	108	+An optimization problem \cite{leung2004handbook} aims at improving one or many
	109	+performance criteria within a constrained resource environment. Amongst the tools
	110	+developed to meet this aim, Mixed-Integer Linear Programming (MILP) provides the framework to
	111	+provide a formal definition of the stated problem and search for an optimal use of available
	112	+resources \cite{yu2007design, kodek1980design}.
	113	+
	114	+The degrees of freedom when addressing the problem of replacing the single monolithic
	115	+FIR with a cascade of optimized filters are the number of coefficients $N_i$ of each filter $i$,
	116	+the number of bits $c_i$ representing the coefficients and the number of bits $d_i$ representing
	117	+the data fed to the filter. Because each FIR in the chain is fed the output of the previous stage,
	118	+the optimization of the complete processing chain within a constrained resource environment is not
	119	+trivial. The resource occupation of a FIR filter is considered as $c_i+d_i+\log_2(N_i)$ which is
	120	+the number of bits needed in a worst case condition to represent the output of the FIR.
	121	+
	122	+
	123	+\begin{figure}[h!tb]
	124	+\includegraphics[width=\linewidth]{images/noise-rejection.pdf}
	125	+\caption{Rejection as a function of number of coefficients and number of bits}
	126	+\label{noise-rejection}
	127	+\end{figure}
	128	+
	129	+The objective function maximizes the noise rejection while keeping resource occupation below
	130	+a user-defined threshold. The MILP solver is allowed to choose the number of successive
	131	+filters, within an upper bound. The last problem is to model the noise rejection. Since filter
	132	+noise rejection capability is not modeled with linear equation, a look-up-table is generated
	133	+for multiple filter configurations in which the $c_i$, $d_i$ and $N_i$ parameters are varied: for each
	134	+one of these conditions, the low-pass filter rejection defined as the mean power between
	135	+half the Nyquist frequency and the Nyquist frequency is stored as computed by the frequency response
	136	+of the digital filter (Fig. \ref{noise-rejection}).
	137	+
	138	+Linear program formalism for solving the problem is well documented: an objective function is
	139	+defined which is linearly dependent on the parameters to be optimized. Constraints are expressed
	140	+as linear equation and solved using one of the available solvers, in our case GLPK\cite{glpk}.
	141	+
	142	+The MILP solver provides a solution to the problem by selecting a series of small FIR with
	143	+increasing number of bits representing data and coefficients as well as an increasing number
	144	+of coefficients, instead of a single monolithic filter. Fig. \ref{compare-fir} exhibits the
	145	+performance comparison between one solution and a monolithic FIR when selecting a cutoff
	146	+frequency of half the Nyquist frequency: a series of 5 FIR and a series of 10 FIR with the
	147	+same space usage are provided as selected by the MILP solver. The FIR cascade provides improved
	148	+rejection than the monolithic FIR at the expense of a lower cutoff frequency which remains to
	149	+be tuned or compensated for.
	150	+
	151	+\begin{figure}[h!tb]
	152	+% \includegraphics[width=\linewidth]{images/compare-fir.pdf}
	153	+\includegraphics[width=\linewidth]{images/fir-mono-vs-fir-series-200dB.pdf}
	154	+\caption{Comparison of the rejection capability between a series of FIR and a monolithic FIR
	155	+with a cutoff frequency set at half the Nyquist frequency.}
	156	+\label{compare-fir}
	157	+\end{figure}
	158	+
	159	+The resource occupation when synthesizing such FIR on a Xilinx FPGA is summarized as Tab. \ref{t1}.
	160	+
	161	+\begin{table}[h!tb]
	162	+\caption{Resource occupation on a Xilinx Zynq-7000 series FPGA when synthesizing the FIR cascade
	163	+identified as optimal by the MILP solver within a finite resource criterion. The last line refers
	164	+to available resources on a Zynq-7010 as found on the Redpitaya board. The rejection is the mean
	165	+value from 0.6 to 1 Nyquist frequency.}
	166	+\begin{center}
	167	+\begin{tabular}{\|c\|cccc\|}\hline
	168	+FIR & BlockRAM & LookUpTables & DSP & rejection (dB)\\\hline\hline
	169	+1 (monolithic) & 1 & 4064 & 40 & -72 \\
	170	+5 & 5 & 12332 & 0 & -217 \\
	171	+10 & 10 & 12717 & 0 & -251 \\\hline\hline
	172	+Zynq 7010 & 60 & 17600 & 80 & \\\hline
	173	+\end{tabular}
	174	+\end{center}
	175	+%\vspace{-0.7cm}
	176	+\label{t1}
	177	+\end{table}
	178	+
	179	+\section{Filter coefficient selection}
	180	+
	181	+The coefficients of a single monolithic filter are computed as the impulse response
	182	+of the filter transfer function, and practically approximated by a multitude of methods
	183	+including least square optimization (Matlab's {\tt firls} function), Hamming or Kaiser windowing
	184	+(Matlab's {\tt fir1} function). Cascading filters opens a new optimization opportunity by
	185	+selecting various coefficient sets depending on the number of coefficients. Fig. \ref{2}
	186	+illustrates that for a number of coefficients ranging from 8 to 47, {\tt fir1} provides a better
	187	+rejection than {\tt firls}: since the linear solver increases the number of coefficients along
	188	+the processing chain, the type of selected filter also changes depending on the number of coefficients
	189	+and evolves along the processing chain.
	190	+
	191	+\begin{figure}[h!tb]
	192	+\includegraphics[width=\linewidth]{images/fir1-vs-firls}
	193	+\caption{Evolution of the rejection capability of least-square optimized filters and Hamming
	194	+FIR filters as a function of the number of coefficients, for floating point numbers and 8-bit
	195	+encoded integers.}
	196	+\label{2}
	197	+\end{figure}
	198	+
	199	+\section{Conclusion}
	200	+
	201	+We address the optimization problem of designing a low-pass filter chain in a Field Programmable Gate
	202	+Array for improved noise rejection within constrained resource occupation, as needed for
	203	+real time processing of radiofrequency signal when characterizing spectral phase noise
	204	+characteristics of stable oscillators. The flexibility of the digital approach makes the result
	205	+best suited for closing the loop and using the measurement output in a feedback loop for
	206	+controlling clocks, e.g. in a quartz-stabilized high performance clock whose long term behavior
	207	+is controlled by non-piezoelectric resonator (sapphire resonator, microwave or optical
	208	+atomic transition).
	209	+
	210	+\section*{Acknowledgement}
	211	+
	212	+This work is supported by the ANR Programme d'Investissement d'Avenir in
	213	+progress at the Time and Frequency Departments of the FEMTO-ST Institute
	214	+(Oscillator IMP, First-TF and Refimeve+), and by R\'egion de Franche-Comt\'e.
	215	+The authors would like to thank E. Rubiola, F. Vernotte, G. Cabodevila for support and
	216	+fruitful discussions.
	217	+
	218	+\bibliographystyle{IEEEtran}
	219	+\bibliography{references}
	220	+\end{document}
1		-\documentclass[a4paper,conference]{IEEEtran/IEEEtran}
2		-\usepackage{graphicx,color,hyperref}
3		-\usepackage{amsfonts}
4		-\usepackage{url}
5		-\usepackage[normalem]{ulem}
6		-\graphicspath{{/home/jmfriedt/gpr/170324_avalanche/}{/home/jmfriedt/gpr/1705_homemade/}}
7		-% correct bad hyphenation here
8		-\hyphenation{op-tical net-works semi-conduc-tor}
9		-\textheight=26cm
10		-\setlength{\footskip}{30pt}
11		-\pagenumbering{gobble}
12		-\begin{document}
13		-\title{Filter optimization for real time digital processing of radiofrequency signals: application
14		-to oscillator metrology}
15		-
16		-\author{\IEEEauthorblockN{A. Hugeat\IEEEauthorrefmark{1}\IEEEauthorrefmark{2}, J. Bernard\IEEEauthorrefmark{2},
17		-G. Goavec-M\'erou\IEEEauthorrefmark{1},
18		-P.-Y. Bourgeois\IEEEauthorrefmark{1}, J.-M. Friedt\IEEEauthorrefmark{1}}
19		-\IEEEauthorblockA{\IEEEauthorrefmark{1}FEMTO-ST, Time \& Frequency department, Besan\c con, France }
20		-\IEEEauthorblockA{\IEEEauthorrefmark{2}FEMTO-ST, Computer Science department DISC, Besan\c con, France \\
21		-Email: \{pyb2,jmfriedt\}@femto-st.fr}
22		-}
23		-\maketitle
24		-\thispagestyle{plain}
25		-\pagestyle{plain}
26		-
27		-\begin{abstract}
28		-Software Defined Radio (SDR) provides stability, flexibility and reconfigurability to
29		-radiofrequency signal processing. Applied to oscillator characterization in the context
30		-of ultrastable clocks, stringent filtering requirements are defined by spurious signal or
31		-noise rejection needs. Since real time radiofrequency processing must be performed in a
32		-Field Programmable Array to meet timing constraints, we investigate optimization strategies
33		-to design filters meeting rejection characteristics while limiting the hardware resources
34		-required and keeping timing constraints within the targeted measurement bandwidths.
35		-\end{abstract}
36		-
37		-\begin{IEEEkeywords}
38		-Software Defined Radio, Mixed-Integer Linear Programming, Finite Impulse Response filter
39		-\end{IEEEkeywords}
40		-
41		-\section{Digital signal processing of ultrastable clock signals}
42		-
43		-Analog oscillator phase noise characteristics are classically performed by downconverting
44		-the radiofrequency signal using a saturated mixer to bring the radiofrequency signal to baseband,
45		-followed by a Fourier analysis of the beat signal to analyze phase fluctuations close to carrier. In
46		-a fully digital approach, the radiofrequency signal is digitized and numerically downconverted by
47		-multiplying the samples with a local numerically controlled oscillator (Fig. \ref{schema}) \cite{rsi}.
48		-
49		-\begin{figure}[h!tb]
50		-\begin{center}
51		-\includegraphics[width=.8\linewidth]{images/schema}
52		-\end{center}
53		-\caption{Fully digital oscillator phase noise characterization: the Device Under Test
54		-(DUT) signal is sampled by the radiofrequency grade Analog to Digital Converter (ADC) and
55		-downconverted by mixing with a Numerically Controlled Oscillator (NCO). Unwanted signals
56		-and noise aliases are rejected by a Low Pass Filter (LPF) implemented as a cascade of Finite
57		-Impulse Response (FIR) filters. The signal is then decimated before a Fourier analysis displays
58		-the spectral characteristics of the phase fluctuations.}
59		-\label{schema}
60		-\end{figure}
61		-
62		-As with the analog mixer,
63		-the non-linear behavior of the downconverter introduces noise or spurious signal aliasing as
64		-well as the generation of the frequency sum signal in addition to the frequency difference.
65		-These unwanted spectral characteristics must be rejected before decimating the data stream
66		-for the phase noise spectral characterization. The characteristics introduced between the downconverter
67		-and the decimation processing blocks are core characteristics of an oscillator characterization
68		-system, and must reject out-of-band signals below the targeted phase noise -- typically in the
69		-sub -170~dBc/Hz for ultrastable oscillator we aim at characterizing. The filter blocks will
70		-use most resources of the Field Programmable Gate Array (FPGA) used to process the radiofrequency
71		-datastream: optimizing the performance of the filter while reducing the needed resources is
72		-hence tackled in a systematic approach using optimization techniques. Most significantly, we
73		-tackle the issue by attempting to cascade multiple Finite Impulse Response (FIR) filters with
74		-tunable number of coefficients and tunable number of bits representing the coefficients and the
75		-data being processed.
76		-
77		-\section{Finite impulse response filter}
78		-
79		-We select FIR filter for their unconditional stability and ease of design. A FIR filter is defined
80		-by a set of weights $b_k$ applied to the inputs $x_k$ through a convolution to generate the outputs $y_k$
81		-$$y_n=\sum_{k=0}^N b_k x_{n-k}$$
82		-
83		-As opposed to an implementation on a general purpose processor in which word size is defined by the
84		-processor architecture, implementing such a filter on an FPGA offer more degrees of freedom since
85		-not only the coefficient values and number of taps must be defined, but also the number of bits defining
86		-the coefficients and the sample size.
87		-
88		-Ideally the coefficient are expressed as floating point value but this notation isn't a efficient way to
89		-work with FPGA. Instead we prefer convert this floating point values into integer values. However this
90		-conversion result in some precision loss. Actually as show figure \ref{float_vs_int}, we see that we aren't
91		-need too coefficients or too sample size. If we have lot of coefficients but a small sample size,
92		-the first and last are equal to zero. But if we have too sample size for few coefficients that not improve the quality.
93		-
94		-\begin{figure}[h!tb]
95		-\includegraphics[width=\linewidth]{images/float-vs-integer.pdf}
96		-\caption{Illistration of coefficients choice impact}
97		-\label{float_vs_int}
98		-\end{figure}
99		-
100		-\section{Filter optimization}
101		-
102		-A basic approach for implementing the FIR filter is to compute the transfer function of
103		-a monolithic filter: this single filter defines all coefficients with the same resolution
104		-(number of bits) and processes data represented with their own resolution. Meeting the
105		-filter shape requires a large number of coefficients, limited by resources of the FPGA since
106		-this filter must process data stream at the radiofrequency sampling rate after the mixer.
107		-
108		-An optimization problem \cite{leung2004handbook} aims at improving one or many
109		-performance criteria within a constrained resource environment. Amongst the tools
110		-developed to meet this aim, Mixed-Integer Linear Programming (MILP) provides the framework to
111		-provide a formal definition of the stated problem and search for an optimal use of available
112		-resources \cite{yu2007design, kodek1980design}.
113		-
114		-The degrees of freedom when addressing the problem of replacing the single monolithic
115		-FIR with a cascade of optimized filters are the number of coefficients $N_i$ of each filter $i$,
116		-the number of bits $c_i$ representing the coefficients and the number of bits $d_i$ representing
117		-the data fed to the filter. Because each FIR in the chain is fed the output of the previous stage,
118		-the optimization of the complete processing chain within a constrained resource environment is not
119		-trivial. The resource occupation of a FIR filter is considered as $c_i+d_i+\log_2(N_i)$ which is
120		-the number of bits needed in a worst case condition to represent the output of the FIR.
121		-
122		-
123		-\begin{figure}[h!tb]
124		-\includegraphics[width=\linewidth]{images/noise-rejection.pdf}
125		-\caption{Rejection as a function of number of coefficients and number of bits}
126		-\label{noise-rejection}
127		-\end{figure}
128		-
129		-The objective function maximizes the noise rejection while keeping resource occupation below
130		-a user-defined threshold. The MILP solver is allowed to choose the number of successive
131		-filters, within an upper bound. The last problem is to model the noise rejection. Since filter
132		-noise rejection capability is not modeled with linear equation, a look-up-table is generated
133		-for multiple filter configurations in which the $c_i$, $d_i$ and $N_i$ parameters are varied: for each
134		-one of these conditions, the low-pass filter rejection defined as the mean power between
135		-half the Nyquist frequency and the Nyquist frequency is stored as computed by the frequency response
136		-of the digital filter (Fig. \ref{noise-rejection}).
137		-
138		-Linear program formalism for solving the problem is well documented: an objective function is
139		-defined which is linearly dependent on the parameters to be optimized. Constraints are expressed
140		-as linear equation and solved using one of the available solvers, in our case GLPK\cite{glpk}.
141		-
142		-The MILP solver provides a solution to the problem by selecting a series of small FIR with
143		-increasing number of bits representing data and coefficients as well as an increasing number
144		-of coefficients, instead of a single monolithic filter. Fig. \ref{compare-fir} exhibits the
145		-performance comparison between one solution and a monolithic FIR when selecting a cutoff
146		-frequency of half the Nyquist frequency: a series of 5 FIR and a series of 10 FIR with the
147		-same space usage are provided as selected by the MILP solver. The FIR cascade provides improved
148		-rejection than the monolithic FIR at the expense of a lower cutoff frequency which remains to
149		-be tuned or compensated for.
150		-
151		-\begin{figure}[h!tb]
152		-% \includegraphics[width=\linewidth]{images/compare-fir.pdf}
153		-\includegraphics[width=\linewidth]{images/fir-mono-vs-fir-series-200dB.pdf}
154		-\caption{Comparison of the rejection capability between a series of FIR and a monolithic FIR
155		-with a cutoff frequency set at half the Nyquist frequency.}
156		-\label{compare-fir}
157		-\end{figure}
158		-
159		-The resource occupation when synthesizing such FIR on a Xilinx FPGA is summarized as Tab. \ref{t1}.
160		-
161		-\begin{table}[h!tb]
162		-\caption{Resource occupation on a Xilinx Zynq-7000 series FPGA when synthesizing the FIR cascade
163		-identified as optimal by the MILP solver within a finite resource criterion. The last line refers
164		-to available resources on a Zynq-7010 as found on the Redpitaya board. The rejection is the mean
165		-value from 0.6 to 1 Nyquist frequency.}
166		-\begin{center}
167		-\begin{tabular}{\|c\|cccc\|}\hline
168		-FIR & BlockRAM & LookUpTables & DSP & rejection (dB)\\\hline\hline
169		-1 (monolithic) & 1 & 4064 & 40 & -72 \\
170		-5 & 5 & 12332 & 0 & -217 \\
171		-10 & 10 & 12717 & 0 & -251 \\\hline\hline
172		-Zynq 7010 & 60 & 17600 & 80 & \\\hline
173		-\end{tabular}
174		-\end{center}
175		-%\vspace{-0.7cm}
176		-\label{t1}
177		-\end{table}
178		-
179		-\section{Filter coefficient selection}
180		-
181		-The coefficients of a single monolithic filter are computed as the impulse response
182		-of the filter transfer function, and practically approximated by a multitude of methods
183		-including least square optimization (Matlab's {\tt firls} function), Hamming or Kaiser windowing
184		-(Matlab's {\tt fir1} function). Cascading filters opens a new optimization opportunity by
185		-selecting various coefficient sets depending on the number of coefficients. Fig. \ref{2}
186		-illustrates that for a number of coefficients ranging from 8 to 47, {\tt fir1} provides a better
187		-rejection than {\tt firls}: since the linear solver increases the number of coefficients along
188		-the processing chain, the type of selected filter also changes depending on the number of coefficients
189		-and evolves along the processing chain.
190		-
191		-\begin{figure}[h!tb]
192		-\includegraphics[width=\linewidth]{images/fir1-vs-firls}
193		-\caption{Evolution of the rejection capability of least-square optimized filters and Hamming
194		-FIR filters as a function of the number of coefficients, for floating point numbers and 8-bit
195		-encoded integers.}
196		-\label{2}
197		-\end{figure}
198		-
199		-\section{Conclusion}
200		-
201		-We address the optimization problem of designing a low-pass filter chain in a Field Programmable Gate
202		-Array for improved noise rejection within constrained resource occupation, as needed for
203		-real time processing of radiofrequency signal when characterizing spectral phase noise
204		-characteristics of stable oscillators. The flexibility of the digital approach makes the result
205		-best suited for closing the loop and using the measurement output in a feedback loop for
206		-controlling clocks, e.g. in a quartz-stabilized high performance clock whose long term behavior
207		-is controlled by non-piezoelectric resonator (sapphire resonator, microwave or optical
208		-atomic transition).
209		-
210		-\section*{Acknowledgement}
211		-
212		-This work is supported by the ANR Programme d'Investissement d'Avenir in
213		-progress at the Time and Frequency Departments of the FEMTO-ST Institute
214		-(Oscillator IMP, First-TF and Refimeve+), and by R\'egion de Franche-Comt\'e.
215		-The authors would like to thank E. Rubiola, F. Vernotte, G. Cabodevila for support and
216		-fruitful discussions.
217		-
218		-\bibliographystyle{IEEEtran}
219		-\bibliography{references}
220		-\end{document}