Suppression d'un copier-coller.

Arthur HUGEAT
1 parent 0642fff00e
Showing 1 changed file with 19 additions and 21 deletions Side-by-side Diff
ifcs2018_journal.tex
@@ -116,7 +116,7 @@
 defining the coefficients and the sample size. For this reason, and because we consider pipeline
 processing (as opposed to First-In, First-Out FIFO memory batch processing) of radiofrequency
 signals, High Level Synthesis (HLS) languages \cite{kasbah2008multigrid} are not considered but
-the problem is tackled at the Very-high-speed-integrated-circuit Hardware Description Language 
+the problem is tackled at the Very-high-speed-integrated-circuit Hardware Description Language
 (VHDL) level.
 Since latency is not an issue in a openloop phase noise characterization instrument, the large
 numbre of taps in the FIR, as opposed to the shorter Infinite Impulse Response (IIR) filter,
@@ -156,8 +156,8 @@
  
 \section{Methodology description}
  
-Our objective is to develop a new methodology applicable to any Digital Signal Processing (DSP) 
-chain obtained by assembling basic processing blocks, with hardware and manufacturer independence. 
+Our objective is to develop a new methodology applicable to any Digital Signal Processing (DSP)
+chain obtained by assembling basic processing blocks, with hardware and manufacturer independence.
 Achieving such a target requires defining an abstract model to represent some basic properties
 of DSP blocks such as perfomance (i.e. rejection or ripples in the bandpass for filters) and
 resource occupation. These abstract properties, not necessarily related to the detailed hardware
  
  
  
@@ -172,22 +172,22 @@
  
 In this demonstration , we focus on only two operations: filtering and shifting the number of
 bits needed to represent the data along the processing chain.
-We have chosen these basic operations because shifting and the filtering have already been studied 
+We have chosen these basic operations because shifting and the filtering have already been studied
 in the literature \cite{lim_1996, lim_1988, young_1992, smith_1998} providing a framework for
-assessing our results. Furthermore, filtering is a core step in any radiofrequency frontend 
-requiring pipelined processing at full bandwidth for the earliest steps, including for 
+assessing our results. Furthermore, filtering is a core step in any radiofrequency frontend
+requiring pipelined processing at full bandwidth for the earliest steps, including for
 time and frequency transfer or characterization \cite{carolina1,carolina2,rsi}.
  
 Addressing only two operations allows for demonstrating the methodology but should not be
 considered as a limitation of the framework which can be extended to assembling any number
 of skeleton blocks as long as perfomance and resource occupation can be determined. Hence,
 in this paper we will apply our methodology on simple DSP chains: a white noise input signal
-is generated using a Pseudo-Random Number (PRN) generator or thanks at a radiofrequency-grade 
+is generated using a Pseudo-Random Number (PRN) generator or thanks at a radiofrequency-grade
 Analog to Digital Converter (ADC) loaded by a 50~$\Omega$ resistor. Once samples have been
 digitized at a rate of 125~MS/s, filtering is applied to qualify the processing block performance --
 practically meeting the radiofrequency frontend requirement of noise and bandwidth reduction
 by filtering and decimating. Finally, bursts of filtered samples are stored for post-processing,
-allowing to assess either filter rejection for a given resource usage, or validating the rejection 
+allowing to assess either filter rejection for a given resource usage, or validating the rejection
 when implementing a solution minimizing resource occupation.
  
 The first step of our approach is to model the DSP chain and since we just optimize
@@ -238,7 +238,7 @@
 With these coefficients, the \texttt{freqz} function is used to estimate the magnitude of the filter
 transfer function.
 Comparing the performance between FIRs requires however defining a unique criterion. As shown in figure~\ref{fig:fir_mag},
-the FIR magnitude exhibits two parts: we focus here on the transitions width and the rejection rather than on the 
+the FIR magnitude exhibits two parts: we focus here on the transitions width and the rejection rather than on the
 bandpass ripples as emphasized in \cite{lim_1988,lim_1996}.
  
 \begin{figure}
@@ -280,7 +280,7 @@
 \end{figure}
  
 In the transition band, the behavior of the filter is left free, we only care about the passband and the stopband characteristics.
-Our initial criterion considered the mean value of the stopband rejection, as shown in figure~\ref{fig:mean_criterion}. This criterion 
+Our initial criterion considered the mean value of the stopband rejection, as shown in figure~\ref{fig:mean_criterion}. This criterion
 yields unacceptable results since notches overestimate the rejection capability of the filter. Furthermore, the losses within
 the passband are not considered and might be excessive for excessively wide transitions widths introduced for filters with few coefficients.
 Such biases are compensated for by the second considered criterion which is based on computing the maximum rejection within the stopband minus the mean of the absolute value of passband rejection. With this criterion, the results are significantly improved as shown in figure~\ref{fig:custom_criterion} and meet the expected rejection capability of low pass filters.
@@ -295,7 +295,7 @@
 \begin{figure}
 \centering
 \includegraphics[width=\linewidth]{images/colored_custom_criterion}
-\caption{Custom criterion (maximum rejection in the stopband minus the mean of the absolute value of the passband rejection) 
+\caption{Custom criterion (maximum rejection in the stopband minus the mean of the absolute value of the passband rejection)
 comparison between monolithic filter and cascaded filters}
 \label{fig:custom_criterion}
 \end{figure}
@@ -304,7 +304,7 @@
 and estimate their rejection. Figure~\ref{fig:rejection_pyramid} exhibits the
 rejection as a function of the number of coefficients and the number of bits representing these coefficients.
 The curve shaped as a pyramid exhibits optimum configurations sets at the vertex where both edges meet.
-Indeed for a given number of coefficients, increasing the number of bits over the edge will not improve the rejection. 
+Indeed for a given number of coefficients, increasing the number of bits over the edge will not improve the rejection.
 Conversely when setting the a given number of bits, increasing the number of coefficients will not improve
 the rejection. Hence the best coefficient set are on the vertex of the pyramid.
  
  
  
@@ -316,15 +316,15 @@
 \end{figure}
  
 Although we have an efficient criterion to estimate the rejection of one set of coefficients (taps),
-we have a problem when we cascade filters and estimate the criterion as a sum two or more individual criteria. 
+we have a problem when we cascade filters and estimate the criterion as a sum two or more individual criteria.
 If the FIR filter coefficients are the same between the stages, we have:
 $$F_{total} = F_1 + F_2$$
 But selecting two different sets of coefficient will yield a more complex situation in which
 the previous relation is no longer valid as illustrated on figure~\ref{fig:sum_rejection}. The red and blue curves
 are two different filters with maximums and notches not located at the same frequency offsets.
-Hence when summing the transfer functions, the resulting rejection shown as the dashed yellow line is improved 
+Hence when summing the transfer functions, the resulting rejection shown as the dashed yellow line is improved
 with respect to a basic sum of the rejection criteria shown as a the dotted yellow line.
-Thus, estimating the rejection of filter cascades is more complex than takin the sum of all the rejection 
+Thus, estimating the rejection of filter cascades is more complex than takin the sum of all the rejection
 criteria of each filter. However since the this sum underestimates the rejection capability of the cascade,
 this upper bound is considered as a pessimistic and acceptable criterion for deciding on the suitability
 of the filter cascade to meet design criteria.
@@ -423,7 +423,7 @@
 \label{sec:workflow}
  
 In this section, we describe the workflow to compute all the results presented in sections~\ref{sec:fixed_area}
-and \ref{sec:fixed_rej}. Figure~\ref{fig:workflow} shows the global workflow and the different steps involved 
+and \ref{sec:fixed_rej}. Figure~\ref{fig:workflow} shows the global workflow and the different steps involved
 in the computation of the results.
  
 \begin{figure}
@@ -463,7 +463,7 @@
  
 The TCL script describes the whole digital processing chain from the beginning
 (the raw signal data) to the end (the filtered data) in a language compatible
-with proprietary synthesis software, namely Vivado for Xilinx and Quartus for 
+with proprietary synthesis software, namely Vivado for Xilinx and Quartus for
 Intel/Altera. The raw input data generated from a 20-bit Pseudo Random Number (PRN)
 generator inside the FPGA and $\Pi^I$ is fixed at 16~bits.
 Then the script builds each stage of the chain with a generic FIR task that
@@ -482,7 +482,7 @@
 provide a broadband noise source.
 The board runs the Linux kernel and surrounding environment produced from the
 Buildroot framework available at \url{https://github.com/trabucayre/redpitaya/}: configuring
-the Zynq FPGA, feeding the FIR with the set of coefficients, executing the simulation and 
+the Zynq FPGA, feeding the FIR with the set of coefficients, executing the simulation and
 fetching the results is automated.
  
 The deploy script uploads the bitstream to the board ((3) on
@@ -703,9 +703,7 @@
  
 As expected, the computation time seems to rise exponentially with the number of stages. % TODO: exponentiel ?
 When the area is limited, the design exploration space is more limited and the solver is able to
-find an optimal solution faster. On the contrary, in the case of MAX/1500 with
-5~stages, we were not able to obtain a result after 40~hours of computation when the program was 
-manually stopped.
+find an optimal solution faster.
  
 \subsection{Minimizing resource occupation at fixed rejection}\label{sec:fixed_rej}
...	...	@@ -116,7 +116,7 @@
116	116	defining the coefficients and the sample size. For this reason, and because we consider pipeline
117	117	processing (as opposed to First-In, First-Out FIFO memory batch processing) of radiofrequency
118	118	signals, High Level Synthesis (HLS) languages \cite{kasbah2008multigrid} are not considered but
119		-the problem is tackled at the Very-high-speed-integrated-circuit Hardware Description Language
	119	+the problem is tackled at the Very-high-speed-integrated-circuit Hardware Description Language
120	120	(VHDL) level.
121	121	Since latency is not an issue in a openloop phase noise characterization instrument, the large
122	122	numbre of taps in the FIR, as opposed to the shorter Infinite Impulse Response (IIR) filter,
...	...	@@ -156,8 +156,8 @@
156	156
157	157	\section{Methodology description}
158	158
159		-Our objective is to develop a new methodology applicable to any Digital Signal Processing (DSP)
160		-chain obtained by assembling basic processing blocks, with hardware and manufacturer independence.
	159	+Our objective is to develop a new methodology applicable to any Digital Signal Processing (DSP)
	160	+chain obtained by assembling basic processing blocks, with hardware and manufacturer independence.
161	161	Achieving such a target requires defining an abstract model to represent some basic properties
162	162	of DSP blocks such as perfomance (i.e. rejection or ripples in the bandpass for filters) and
163	163	resource occupation. These abstract properties, not necessarily related to the detailed hardware
164	164
165	165
166	166
...	...	@@ -172,22 +172,22 @@
172	172
173	173	In this demonstration , we focus on only two operations: filtering and shifting the number of
174	174	bits needed to represent the data along the processing chain.
175		-We have chosen these basic operations because shifting and the filtering have already been studied
	175	+We have chosen these basic operations because shifting and the filtering have already been studied
176	176	in the literature \cite{lim_1996, lim_1988, young_1992, smith_1998} providing a framework for
177		-assessing our results. Furthermore, filtering is a core step in any radiofrequency frontend
178		-requiring pipelined processing at full bandwidth for the earliest steps, including for
	177	+assessing our results. Furthermore, filtering is a core step in any radiofrequency frontend
	178	+requiring pipelined processing at full bandwidth for the earliest steps, including for
179	179	time and frequency transfer or characterization \cite{carolina1,carolina2,rsi}.
180	180
181	181	Addressing only two operations allows for demonstrating the methodology but should not be
182	182	considered as a limitation of the framework which can be extended to assembling any number
183	183	of skeleton blocks as long as perfomance and resource occupation can be determined. Hence,
184	184	in this paper we will apply our methodology on simple DSP chains: a white noise input signal
185		-is generated using a Pseudo-Random Number (PRN) generator or thanks at a radiofrequency-grade
	185	+is generated using a Pseudo-Random Number (PRN) generator or thanks at a radiofrequency-grade
186	186	Analog to Digital Converter (ADC) loaded by a 50~$\Omega$ resistor. Once samples have been
187	187	digitized at a rate of 125~MS/s, filtering is applied to qualify the processing block performance --
188	188	practically meeting the radiofrequency frontend requirement of noise and bandwidth reduction
189	189	by filtering and decimating. Finally, bursts of filtered samples are stored for post-processing,
190		-allowing to assess either filter rejection for a given resource usage, or validating the rejection
	190	+allowing to assess either filter rejection for a given resource usage, or validating the rejection
191	191	when implementing a solution minimizing resource occupation.
192	192
193	193	The first step of our approach is to model the DSP chain and since we just optimize
...	...	@@ -238,7 +238,7 @@
238	238	With these coefficients, the \texttt{freqz} function is used to estimate the magnitude of the filter
239	239	transfer function.
240	240	Comparing the performance between FIRs requires however defining a unique criterion. As shown in figure~\ref{fig:fir_mag},
241		-the FIR magnitude exhibits two parts: we focus here on the transitions width and the rejection rather than on the
	241	+the FIR magnitude exhibits two parts: we focus here on the transitions width and the rejection rather than on the
242	242	bandpass ripples as emphasized in \cite{lim_1988,lim_1996}.
243	243
244	244	\begin{figure}
...	...	@@ -280,7 +280,7 @@
280	280	\end{figure}
281	281
282	282	In the transition band, the behavior of the filter is left free, we only care about the passband and the stopband characteristics.
283		-Our initial criterion considered the mean value of the stopband rejection, as shown in figure~\ref{fig:mean_criterion}. This criterion
	283	+Our initial criterion considered the mean value of the stopband rejection, as shown in figure~\ref{fig:mean_criterion}. This criterion
284	284	yields unacceptable results since notches overestimate the rejection capability of the filter. Furthermore, the losses within
285	285	the passband are not considered and might be excessive for excessively wide transitions widths introduced for filters with few coefficients.
286	286	Such biases are compensated for by the second considered criterion which is based on computing the maximum rejection within the stopband minus the mean of the absolute value of passband rejection. With this criterion, the results are significantly improved as shown in figure~\ref{fig:custom_criterion} and meet the expected rejection capability of low pass filters.
...	...	@@ -295,7 +295,7 @@
295	295	\begin{figure}
296	296	\centering
297	297	\includegraphics[width=\linewidth]{images/colored_custom_criterion}
298		-\caption{Custom criterion (maximum rejection in the stopband minus the mean of the absolute value of the passband rejection)
	298	+\caption{Custom criterion (maximum rejection in the stopband minus the mean of the absolute value of the passband rejection)
299	299	comparison between monolithic filter and cascaded filters}
300	300	\label{fig:custom_criterion}
301	301	\end{figure}
...	...	@@ -304,7 +304,7 @@
304	304	and estimate their rejection. Figure~\ref{fig:rejection_pyramid} exhibits the
305	305	rejection as a function of the number of coefficients and the number of bits representing these coefficients.
306	306	The curve shaped as a pyramid exhibits optimum configurations sets at the vertex where both edges meet.
307		-Indeed for a given number of coefficients, increasing the number of bits over the edge will not improve the rejection.
	307	+Indeed for a given number of coefficients, increasing the number of bits over the edge will not improve the rejection.
308	308	Conversely when setting the a given number of bits, increasing the number of coefficients will not improve
309	309	the rejection. Hence the best coefficient set are on the vertex of the pyramid.
310	310
311	311
312	312
...	...	@@ -316,15 +316,15 @@
316	316	\end{figure}
317	317
318	318	Although we have an efficient criterion to estimate the rejection of one set of coefficients (taps),
319		-we have a problem when we cascade filters and estimate the criterion as a sum two or more individual criteria.
	319	+we have a problem when we cascade filters and estimate the criterion as a sum two or more individual criteria.
320	320	If the FIR filter coefficients are the same between the stages, we have:
321	321	$$F_{total} = F_1 + F_2$$
322	322	But selecting two different sets of coefficient will yield a more complex situation in which
323	323	the previous relation is no longer valid as illustrated on figure~\ref{fig:sum_rejection}. The red and blue curves
324	324	are two different filters with maximums and notches not located at the same frequency offsets.
325		-Hence when summing the transfer functions, the resulting rejection shown as the dashed yellow line is improved
	325	+Hence when summing the transfer functions, the resulting rejection shown as the dashed yellow line is improved
326	326	with respect to a basic sum of the rejection criteria shown as a the dotted yellow line.
327		-Thus, estimating the rejection of filter cascades is more complex than takin the sum of all the rejection
	327	+Thus, estimating the rejection of filter cascades is more complex than takin the sum of all the rejection
328	328	criteria of each filter. However since the this sum underestimates the rejection capability of the cascade,
329	329	this upper bound is considered as a pessimistic and acceptable criterion for deciding on the suitability
330	330	of the filter cascade to meet design criteria.
...	...	@@ -423,7 +423,7 @@
423	423	\label{sec:workflow}
424	424
425	425	In this section, we describe the workflow to compute all the results presented in sections~\ref{sec:fixed_area}
426		-and \ref{sec:fixed_rej}. Figure~\ref{fig:workflow} shows the global workflow and the different steps involved
	426	+and \ref{sec:fixed_rej}. Figure~\ref{fig:workflow} shows the global workflow and the different steps involved
427	427	in the computation of the results.
428	428
429	429	\begin{figure}
...	...	@@ -463,7 +463,7 @@
463	463
464	464	The TCL script describes the whole digital processing chain from the beginning
465	465	(the raw signal data) to the end (the filtered data) in a language compatible
466		-with proprietary synthesis software, namely Vivado for Xilinx and Quartus for
	466	+with proprietary synthesis software, namely Vivado for Xilinx and Quartus for
467	467	Intel/Altera. The raw input data generated from a 20-bit Pseudo Random Number (PRN)
468	468	generator inside the FPGA and $\Pi^I$ is fixed at 16~bits.
469	469	Then the script builds each stage of the chain with a generic FIR task that
...	...	@@ -482,7 +482,7 @@
482	482	provide a broadband noise source.
483	483	The board runs the Linux kernel and surrounding environment produced from the
484	484	Buildroot framework available at \url{https://github.com/trabucayre/redpitaya/}: configuring
485		-the Zynq FPGA, feeding the FIR with the set of coefficients, executing the simulation and
	485	+the Zynq FPGA, feeding the FIR with the set of coefficients, executing the simulation and
486	486	fetching the results is automated.
487	487
488	488	The deploy script uploads the bitstream to the board ((3) on
...	...	@@ -703,9 +703,7 @@
703	703
704	704	As expected, the computation time seems to rise exponentially with the number of stages. % TODO: exponentiel ?
705	705	When the area is limited, the design exploration space is more limited and the solver is able to
706		-find an optimal solution faster. On the contrary, in the case of MAX/1500 with
707		-5~stages, we were not able to obtain a result after 40~hours of computation when the program was
708		-manually stopped.
	706	+find an optimal solution faster.
709	707
710	708	\subsection{Minimizing resource occupation at fixed rejection}\label{sec:fixed_rej}
711	709