ajout derniere version du poster.

Arthur HUGEAT
1 parent 8203e5dcfe
Showing 1 changed file with 5 additions and 5 deletions Side-by-side Diff
ifcs2018_poster.tex
@@ -100,7 +100,7 @@
 \vspace{-.40cm}
   \addblock{0.38\textwidth}{
 %  \begin{enumerate}[noitemsep,nolistsep]
-%    \item 
+%    \item
 \textbf{1. Classical way:}\\
     Compute transfer function of a monolithic filter
     \begin{itemize}[label=$\Rightarrow$, noitemsep, nolistsep]
@@ -113,7 +113,7 @@
   \addblock{0.40\textwidth}{
 %  \begin{enumerate}
 %    \setcounter{enumi}{1}
-%    \item 
+%    \item
 \textbf{2. Alternative way (our focus):}\\
     Cascade of small(er) filters
     \begin{itemize}[label=$\Rightarrow$, noitemsep, nolistsep]
@@ -131,7 +131,7 @@
     \begin{itemize}[noitemsep,nolistsep]
       \item One or many {\bf performance criteria} (rejection, noise,
 throughput...)
-      \item Limited {\bf resources} (area on FPGA) \hfill {\bf each FIR outputs} $y_n=\sum_{k=0}^{N_i} 
+      \item Limited {\bf resources} (area on FPGA) \hfill {\bf each FIR outputs} $y_n=\sum_{k=0}^{N_i}
 \underbrace{b_{i_k}}_{c_i\mbox{ \footnotesize bits}}\times x_{n-k}$
     \end{itemize}
  
@@ -145,7 +145,7 @@
 %  \begin{enumerate}[noitemsep,nolistsep]
 %    \item
 \noindent
-%    \item 
+%    \item
 %   \item
 %  \end{enumerate}
 %}
@@ -197,7 +197,7 @@
 \vspace{0.4cm}
   \item {\bf Rejection}: the last configuration is better than the first one but worse
 than the monolithic filter
-  \item Resource {\bf consumption} assessed by {\bf synthesizing designs in Vivado} (2017): filter cascade uses less
+  \item Resource {\bf consumption} assessed by {\bf synthesizing designs in Vivado} (2016.2): filter cascade uses less
 resources than a single monolithic filter (too large to fit in Zedboard's Zynq 7020)
 \vspace{-.33cm}
   \begin{center}
...	...	@@ -100,7 +100,7 @@
100	100	\vspace{-.40cm}
101	101	\addblock{0.38\textwidth}{
102	102	% \begin{enumerate}[noitemsep,nolistsep]
103		-% \item
	103	+% \item
104	104	\textbf{1. Classical way:}\\
105	105	Compute transfer function of a monolithic filter
106	106	\begin{itemize}[label=$\Rightarrow$, noitemsep, nolistsep]
...	...	@@ -113,7 +113,7 @@
113	113	\addblock{0.40\textwidth}{
114	114	% \begin{enumerate}
115	115	% \setcounter{enumi}{1}
116		-% \item
	116	+% \item
117	117	\textbf{2. Alternative way (our focus):}\\
118	118	Cascade of small(er) filters
119	119	\begin{itemize}[label=$\Rightarrow$, noitemsep, nolistsep]
...	...	@@ -131,7 +131,7 @@
131	131	\begin{itemize}[noitemsep,nolistsep]
132	132	\item One or many {\bf performance criteria} (rejection, noise,
133	133	throughput...)
134		- \item Limited {\bf resources} (area on FPGA) \hfill {\bf each FIR outputs} $y_n=\sum_{k=0}^{N_i}
	134	+ \item Limited {\bf resources} (area on FPGA) \hfill {\bf each FIR outputs} $y_n=\sum_{k=0}^{N_i}
135	135	\underbrace{b_{i_k}}_{c_i\mbox{ \footnotesize bits}}\times x_{n-k}$
136	136	\end{itemize}
137	137
...	...	@@ -145,7 +145,7 @@
145	145	% \begin{enumerate}[noitemsep,nolistsep]
146	146	% \item
147	147	\noindent
148		-% \item
	148	+% \item
149	149	% \item
150	150	% \end{enumerate}
151	151	%}
...	...	@@ -197,7 +197,7 @@
197	197	\vspace{0.4cm}
198	198	\item {\bf Rejection}: the last configuration is better than the first one but worse
199	199	than the monolithic filter
200		- \item Resource {\bf consumption} assessed by {\bf synthesizing designs in Vivado} (2017): filter cascade uses less
	200	+ \item Resource {\bf consumption} assessed by {\bf synthesizing designs in Vivado} (2016.2): filter cascade uses less
201	201	resources than a single monolithic filter (too large to fit in Zedboard's Zynq 7020)
202	202	\vspace{-.33cm}
203	203	\begin{center}