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\begin{document}

% Title
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\textbf{{\scshape
  \LARGE\color{OliveGreen}
  Filter optimization for real time digital processing of radiofrequency signals: application
  to oscillator metrology
\\}}
\end{center}

\vspace{-0.35cm}
% Authors
\begin{center}
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A. \textsc{Hugeat}$^{*}$, J. \textsc{Bernard}\\
~\\
FEMTO-ST, DISC dept., Besan\c con, France
}
\addalignedblock{0.28\textwidth}{center}{%
G. \textsc{Goavec-Merou},\\
P.-Y. \textsc{Bourgeois}, J.-M \textsc{Friedt}\\
$^{*}$FEMTO-ST, Time \& Frequency dept., Besan\c con, France
}
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% First part
\vspace{-.61cm}
\newsection{Digital signal processing of ultrastable clock signals}

\vspace{-.21cm}
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\begin{itemize}[leftmargin=*]
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\item
{\bf Digital phase noise characterization}: flexibility (software defined local
oscillator),\\ stability (no long term drift), reconfigurabilty
$\Rightarrow$ {\bf software defined radio} oscillator \\
phase noise characterization
\item analog to digital conversion of radiofrequency signal, software
defined local oscillator,
mixer and {\bf low pass filter}
\item low pass filter uses most resources and introduces latency (phase delay
in feedback loop): needs to be optimized
\end{itemize}
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\vspace{-3cm}\hfill\includegraphics[width=.28\linewidth]{schema}
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\vspace{1.29cm}
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% Second part
\vspace{-.61cm}
\newsection{Filter design and implementation strategy:}
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\vspace{-.40cm}
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%  \begin{enumerate}[noitemsep,nolistsep]
%    \item 
\textbf{1. Classical way:}\\
    Compute transfer function of a monolithic filter
    \begin{itemize}[label=$\Rightarrow$, noitemsep, nolistsep]
      {\color{Green}\item Simplest way to design filter}
      {\color{Red}\item Fixed configuration (bits/coef.)}
      {\color{Red}\item High resource consumption on FPGA}
    \end{itemize}
%  \end{enumerate}
  }
  \addblock{0.40\textwidth}{
%  \begin{enumerate}
%    \setcounter{enumi}{1}
%    \item 
\textbf{2. Alternative way (our focus):}\\
    Cascade of small(er) filters
    \begin{itemize}[label=$\Rightarrow$, noitemsep, nolistsep]
      {\color{Green}\item Fewer resource consumption on FPGA}
      {\color{Green}\item Flexibility (increasing bits/coef.)}
      {\color{Red}\item Harder way to design filter}
    \end{itemize}
%  \end{enumerate}
  }

\vspace{-2.6cm}\hfill\includegraphics[width=.2\linewidth]{schema2}
\vspace{-0.3cm}

  The 2\textsuperscript{nd} way could be considered as an optimization problem:
    \begin{itemize}[noitemsep,nolistsep]
      \item One or many {\bf performance criteria} (rejection, noise,
throughput...)
      \item Limited {\bf resources} (area on FPGA) \hfill {\bf each FIR outputs} $y_n=\sum_{k=0}^{N_i} 
\underbrace{b_{i_k}}_{c_i\mbox{ \footnotesize bits}}\times x_{n-k}$
    \end{itemize}

\vspace{-0.40cm}
\noindent Expressed as a {\bf Mixed-Integer Linear Programming} (MILP) with GLPK solver

\noindent 3 degrees of freedom: number of filters, $N_i$ number of coef. for each filter $i$, $c_i$
number of bits for coefficients of filter $i$
\vspace{.1cm}
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\noindent
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\vspace{-0.5cm}
\newsection{Filter selection}
\vspace{-0.3cm}
\begin{itemize}[noitemsep,nolistsep]
  \item For select the filter design we need to evaluate the rejection like:

%  \begin{enumerate}[noitemsep,nolistsep]
%    \item The mean value of rejection
%    \item The median value of rejection
%    \item A custom criterion (we penalize the rejection in base band and we keep only the maximum rejection on the filter tail)
%  \end{enumerate}
  \begin{minipage}[t]{0.30\textwidth}
    \includegraphics[width=0.95\textwidth]{images/noise-rejection-mean}
    %\captionof{figure}
{Criterion=mean value of rejection}
  \end{minipage}
  \begin{minipage}[t]{0.30\textwidth}
    \includegraphics[width=0.95\textwidth]{images/noise-rejection-median}
%    \captionof{figure}{
{Criterion=median value of rejection}
  \end{minipage}
  \begin{minipage}[t]{0.30\textwidth}
    \includegraphics[width=0.95\textwidth]{images/noise-rejection-custom}
%    \captionof{figure}
{Criterion=max value of rejection}
  \end{minipage}
\vspace{0.4cm}
  \item All rejection criteria produce the same kind of result: the best filters seem to be in the edge of pyramid
  \item For each criteria, we associate the rejection to the related filter and we let GLPK choose the best configuration\\
  \begin{minipage}[t]{0.30\textwidth}
    \includegraphics[width=0.95\textwidth]{images/fir-mono-vs-fir-series-noise-fixe-mean.pdf}
%    \captionof{figure}{
{Criterion=mean value of rejection}
  \end{minipage}
  \begin{minipage}[t]{0.30\textwidth}
    \includegraphics[width=0.95\textwidth]{images/fir-mono-vs-fir-series-noise-fixe-median.pdf}
%    \captionof{figure}
{Criterion=median value of rejection}
  \end{minipage}
  \begin{minipage}[t]{0.30\textwidth}
    \includegraphics[width=0.95\textwidth]{images/fir-mono-vs-fir-series-noise-fixe-jmf.pdf}
%    \captionof{figure}
{Criterion=max value of rejection}
  \end{minipage}
\vspace{0.4cm}
  \item {\bf Rejection}: the last configuration is better than the first one but worse
than the monolithic filter
  \item Resource {\bf consumption} assessed by {\bf synthesizing designs in Vivado} (2017): filter cascade uses less
resources than a single monolithic filter (too large to fit in Zedboard's Zynq 7020)
\vspace{-.33cm}
  \begin{center}
    \begin{tabular}{|c|ccccc|}\hline
    FIR & BlockRAM36 & BlockRAM18 & LookUpTables & DSP & rejection (dB)\\\hline\hline
    1 (monolithic) & 1 & 0 & {\color{Red}76183} & 220 & -162 \\
    5 & 0 & 5 & {\color{Green}18597} & 220 & -160 \\
    10 & 0 & 8 & {\color{Green}24729} & 220 & -161 \\\hline\hline
    \textbf{Zynq 7020} & \textbf{140} & \textbf{280} & \textbf{53200} & \textbf{220} &  \\\hline
    \end{tabular}
%    \captionof{table}{Resources consumption when we use the configuration with the custom criterion}
  \end{center}
  \item Filter cascade: {\bf targeted rejection level} (-160~dB) reached with the max(rejection) criterion
\end{itemize}
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\vspace{-.71cm}
\newsection{Conclusion}

\vspace{-.21cm}
\noindent
FIR filter implementation in an FPGA as an optimization problem: best
results with cascaded filters with increasing number of coefficients
and resolution
\end{document}