bdubois / Photodiode board

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Commit f4c585c53d3b583b669ef9230f9dc733ff37c4d7

Authored by bdubois
0 parents
Exists in master

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Showing 8 changed files with 4057 additions and 0 deletions Side-by-side Diff

... ... @@ -0,0 +1,21 @@
  1 +Id,Designator,Package,Quantity,Designation,Supplier and ref
  2 +1,"REF**,REF**,REF**,REF**",VIA-0.9MM,4,VIA-0.9MM,
  3 +2,"C1,C5,C7,C9,C12",C_0805,5,1 uF,
  4 +3,"C2,C6,C8,C11",C_0805,4,0.1 uF,
  5 +4,"C3,C4",C_0603,2,10 nF,
  6 +5,"C10,C13,C14",C_1210,3,22 uF,
  7 +6,C15,C_0805,1,0,
  8 +7,R1,R_0805,1,158,
  9 +8,R2,R_0805,1,2.5k,
  10 +9,R3,R_0805,1,50,
  11 +10,"R4,R7",R_0805,2,0,
  12 +11,R5,R_0805,1,1k,
  13 +12,R6,R_0805,1,99k,
  14 +13,SMA_E1,MY_SMA_EDGE,1,AC,
  15 +14,SMA_E2,MY_SMA_EDGE,1,DC,
  16 +15,"U1,U3",CD542,2,ADCH-80A,Mini Circuit
  17 +16,U4,SOT-223,1,LM1117,
  18 +17,U5,SOIC-8-N,1,OP27,
  19 +18,D1,PHOTODIODES,1,FGA01FC,
  20 +19,"P5,GND,V-,V+",1PIN_LARGE_SMD,4,CONN_1,
  21 +20,U2,VV105,1,ERA5+,Mini Circuit
... ... @@ -0,0 +1,275 @@
  1 +Cmp-Mod V01 Created by PcbNew date = Wed Nov 9 14:45:31 2016
  2 +
  3 +BeginCmp
  4 +TimeStamp = 5406FB3D
  5 +Path = /54006970
  6 +Reference = SMA_E1;
  7 +ValeurCmp = SMA_EDGE;
  8 +IdModule = MY_SMA_EDGE;
  9 +EndCmp
  10 +
  11 +BeginCmp
  12 +TimeStamp = 53FF3486
  13 +Path = /53038825
  14 +Reference = C8;
  15 +ValeurCmp = 0.1 uF;
  16 +IdModule = SM0805;
  17 +EndCmp
  18 +
  19 +BeginCmp
  20 +TimeStamp = 53FF3493
  21 +Path = /4E567D57
  22 +Reference = R4;
  23 +ValeurCmp = 10k;
  24 +IdModule = SM0805;
  25 +EndCmp
  26 +
  27 +BeginCmp
  28 +TimeStamp = 53FF34E1
  29 +Path = /4E567D60
  30 +Reference = R5;
  31 +ValeurCmp = 3k;
  32 +IdModule = SM0805;
  33 +EndCmp
  34 +
  35 +BeginCmp
  36 +TimeStamp = 53FF3515
  37 +Path = /4E567FC5
  38 +Reference = C11;
  39 +ValeurCmp = 0.1 uF;
  40 +IdModule = SM0805;
  41 +EndCmp
  42 +
  43 +BeginCmp
  44 +TimeStamp = 5451EF2C
  45 +Path = /4E568440
  46 +Reference = GND;
  47 +ValeurCmp = CONN_1;
  48 +IdModule = 1PIN_SMD;
  49 +EndCmp
  50 +
  51 +BeginCmp
  52 +TimeStamp = 54097605
  53 +Path = /4E567E0E
  54 +Reference = V+;
  55 +ValeurCmp = CONN_1;
  56 +IdModule = 1PIN_SMD;
  57 +EndCmp
  58 +
  59 +BeginCmp
  60 +TimeStamp = 5451F408
  61 +Path = /4E567FD6
  62 +Reference = V-;
  63 +ValeurCmp = CONN_1;
  64 +IdModule = 1PIN_SMD;
  65 +EndCmp
  66 +
  67 +BeginCmp
  68 +TimeStamp = 53FF342B
  69 +Path = /53038A04
  70 +Reference = C7;
  71 +ValeurCmp = 1 uF;
  72 +IdModule = SM0805;
  73 +EndCmp
  74 +
  75 +BeginCmp
  76 +TimeStamp = 540975D7
  77 +Path = /53038A64
  78 +Reference = C2;
  79 +ValeurCmp = 1 uF;
  80 +IdModule = SM0805;
  81 +EndCmp
  82 +
  83 +BeginCmp
  84 +TimeStamp = 53FF346C
  85 +Path = /53FF12F5
  86 +Reference = C12;
  87 +ValeurCmp = 1 uF;
  88 +IdModule = SM0805;
  89 +EndCmp
  90 +
  91 +BeginCmp
  92 +TimeStamp = 53FF34AD
  93 +Path = /4E5675D0
  94 +Reference = R1;
  95 +ValeurCmp = 158;
  96 +IdModule = SM0805;
  97 +EndCmp
  98 +
  99 +BeginCmp
  100 +TimeStamp = 53FF34BA
  101 +Path = /4E567D2A
  102 +Reference = R2;
  103 +ValeurCmp = 1.5k;
  104 +IdModule = SM0805;
  105 +EndCmp
  106 +
  107 +BeginCmp
  108 +TimeStamp = 5406FB92
  109 +Path = /54006961
  110 +Reference = SMA_E2;
  111 +ValeurCmp = SMA_EDGE;
  112 +IdModule = MY_SMA_EDGE;
  113 +EndCmp
  114 +
  115 +BeginCmp
  116 +TimeStamp = 543FDB4C
  117 +Path = /543F8102
  118 +Reference = P5;
  119 +ValeurCmp = CONN_1;
  120 +IdModule = 1PIN_SMALL_SMD;
  121 +EndCmp
  122 +
  123 +BeginCmp
  124 +TimeStamp = 53FF33E6
  125 +Path = /530336D3
  126 +Reference = D1;
  127 +ValeurCmp = FGA01FC;
  128 +IdModule = PHOTODIODES;
  129 +EndCmp
  130 +
  131 +BeginCmp
  132 +TimeStamp = 5406FB86
  133 +Path = /53033C3A
  134 +Reference = U1;
  135 +ValeurCmp = ERA5+;
  136 +IdModule = CD542;
  137 +EndCmp
  138 +
  139 +BeginCmp
  140 +TimeStamp = 543FE2DC
  141 +Path = /53038168
  142 +Reference = U2;
  143 +ValeurCmp = OP27;
  144 +IdModule = VV105;
  145 +EndCmp
  146 +
  147 +BeginCmp
  148 +TimeStamp = 543FE2E7
  149 +Path = /4E5675C2
  150 +Reference = C3;
  151 +ValeurCmp = 0.1 uF;
  152 +IdModule = SM0603;
  153 +EndCmp
  154 +
  155 +BeginCmp
  156 +TimeStamp = 540975FB
  157 +Path = /53FEF107
  158 +Reference = C1;
  159 +ValeurCmp = 47 uF;
  160 +IdModule = SM0805;
  161 +EndCmp
  162 +
  163 +BeginCmp
  164 +TimeStamp = 54071750
  165 +Path = /53FEF2E1
  166 +Reference = C4;
  167 +ValeurCmp = 47 uF;
  168 +IdModule = SM0603;
  169 +EndCmp
  170 +
  171 +BeginCmp
  172 +TimeStamp = 5406FB67
  173 +Path = /4E567D96
  174 +Reference = C6;
  175 +ValeurCmp = 10 nF;
  176 +IdModule = SM0805;
  177 +EndCmp
  178 +
  179 +BeginCmp
  180 +TimeStamp = 53FF34FB
  181 +Path = /4E567D84
  182 +Reference = C5;
  183 +ValeurCmp = 10 nF;
  184 +IdModule = SM0805;
  185 +EndCmp
  186 +
  187 +BeginCmp
  188 +TimeStamp = 5406FB5A
  189 +Path = /5406E05D
  190 +Reference = U4;
  191 +ValeurCmp = ADCH-80A;
  192 +IdModule = SOT223;
  193 +EndCmp
  194 +
  195 +BeginCmp
  196 +TimeStamp = 543E9984
  197 +Path = /53038168
  198 +Reference = U5;
  199 +ValeurCmp = OP27;
  200 +IdModule = SO8N;
  201 +EndCmp
  202 +
  203 +BeginCmp
  204 +TimeStamp = 543FE2F7
  205 +Path = /540024AC
  206 +Reference = U3;
  207 +ValeurCmp = LM1117;
  208 +IdModule = CD542;
  209 +EndCmp
  210 +
  211 +BeginCmp
  212 +TimeStamp = 53FF34C7
  213 +Path = /4E567D3C
  214 +Reference = R3;
  215 +ValeurCmp = 50;
  216 +IdModule = SM0603;
  217 +EndCmp
  218 +
  219 +BeginCmp
  220 +TimeStamp = 540722C6
  221 +Path = /53FED47D
  222 +Reference = C13;
  223 +ValeurCmp = 10 uF;
  224 +IdModule = c_1210;
  225 +EndCmp
  226 +
  227 +BeginCmp
  228 +TimeStamp = 5400A314
  229 +Path = /53FED48B
  230 +Reference = C14;
  231 +ValeurCmp = 22 uF;
  232 +IdModule = c_1210;
  233 +EndCmp
  234 +
  235 +BeginCmp
  236 +TimeStamp = 53FF3522
  237 +Path = /4E5683C8
  238 +Reference = C10;
  239 +ValeurCmp = 0.1 uF;
  240 +IdModule = c_0805;
  241 +EndCmp
  242 +
  243 +BeginCmp
  244 +TimeStamp = 53FF345F
  245 +Path = /53FF12EF
  246 +Reference = C9;
  247 +ValeurCmp = 1 uF;
  248 +IdModule = c_1210;
  249 +EndCmp
  250 +
  251 +BeginCmp
  252 +TimeStamp = 543E99C9
  253 +Path = /4E567D60
  254 +Reference = R6;
  255 +ValeurCmp = 99k;
  256 +IdModule = SM0805;
  257 +EndCmp
  258 +
  259 +BeginCmp
  260 +TimeStamp = 543FE339
  261 +Path = /543FDF38
  262 +Reference = R7;
  263 +ValeurCmp = 0;
  264 +IdModule = SM0805;
  265 +EndCmp
  266 +
  267 +BeginCmp
  268 +TimeStamp = 543FE530
  269 +Path = /543FE496
  270 +Reference = C15;
  271 +ValeurCmp = 0;
  272 +IdModule = SM0805;
  273 +EndCmp
  274 +
  275 +EndListe
Diff suppressed. Click to show
... ... @@ -0,0 +1,2219 @@
  1 +(kicad_pcb (version 3) (host pcbnew "(22-Jun-2014 BZR 4027)-stable")
  2 +
  3 + (general
  4 + (links 63)
  5 + (no_connects 0)
  6 + (area 115.474999 46.600001 212.012586 102.140501)
  7 + (thickness 1.6)
  8 + (drawings 10)
  9 + (tracks 505)
  10 + (zones 0)
  11 + (modules 34)
  12 + (nets 15)
  13 + )
  14 +
  15 + (page A3)
  16 + (layers
  17 + (15 F.Cu signal)
  18 + (0 B.Cu signal)
  19 + (16 B.Adhes user)
  20 + (17 F.Adhes user)
  21 + (18 B.Paste user)
  22 + (19 F.Paste user)
  23 + (20 B.SilkS user)
  24 + (21 F.SilkS user)
  25 + (22 B.Mask user)
  26 + (23 F.Mask user)
  27 + (24 Dwgs.User user)
  28 + (25 Cmts.User user)
  29 + (26 Eco1.User user)
  30 + (27 Eco2.User user)
  31 + (28 Edge.Cuts user)
  32 + )
  33 +
  34 + (setup
  35 + (last_trace_width 0.8)
  36 + (trace_clearance 0.15)
  37 + (zone_clearance 0.508)
  38 + (zone_45_only no)
  39 + (trace_min 0.15)
  40 + (segment_width 0.2)
  41 + (edge_width 0.15)
  42 + (via_size 0.6)
  43 + (via_drill 0.3)
  44 + (via_min_size 0.6)
  45 + (via_min_drill 0.3)
  46 + (uvia_size 0.508)
  47 + (uvia_drill 0.127)
  48 + (uvias_allowed no)
  49 + (uvia_min_size 0.508)
  50 + (uvia_min_drill 0.127)
  51 + (pcb_text_width 0.3)
  52 + (pcb_text_size 1.5 1.5)
  53 + (mod_edge_width 0.15)
  54 + (mod_text_size 1.5 1.5)
  55 + (mod_text_width 0.15)
  56 + (pad_size 1.25 2)
  57 + (pad_drill 0.6)
  58 + (pad_to_mask_clearance 0.2)
  59 + (aux_axis_origin 0 0)
  60 + (visible_elements FFFF6739)
  61 + (pcbplotparams
  62 + (layerselection 335511553)
  63 + (usegerberextensions false)
  64 + (excludeedgelayer true)
  65 + (linewidth 0.100000)
  66 + (plotframeref false)
  67 + (viasonmask false)
  68 + (mode 1)
  69 + (useauxorigin false)
  70 + (hpglpennumber 1)
  71 + (hpglpenspeed 20)
  72 + (hpglpendiameter 15)
  73 + (hpglpenoverlay 2)
  74 + (psnegative false)
  75 + (psa4output false)
  76 + (plotreference true)
  77 + (plotvalue false)
  78 + (plotothertext true)
  79 + (plotinvisibletext false)
  80 + (padsonsilk false)
  81 + (subtractmaskfromsilk false)
  82 + (outputformat 1)
  83 + (mirror false)
  84 + (drillshape 0)
  85 + (scaleselection 1)
  86 + (outputdirectory fga01fc_v02/))
  87 + )
  88 +
  89 + (net 0 "")
  90 + (net 1 +5V)
  91 + (net 2 GND)
  92 + (net 3 N-0000010)
  93 + (net 4 N-0000011)
  94 + (net 5 N-0000012)
  95 + (net 6 N-0000013)
  96 + (net 7 N-0000014)
  97 + (net 8 N-000002)
  98 + (net 9 N-000004)
  99 + (net 10 N-000007)
  100 + (net 11 N-000008)
  101 + (net 12 N-000009)
  102 + (net 13 VCC)
  103 + (net 14 VEE)
  104 +
  105 + (net_class Default "This is the default net class."
  106 + (clearance 0.15)
  107 + (trace_width 0.8)
  108 + (via_dia 0.6)
  109 + (via_drill 0.3)
  110 + (uvia_dia 0.508)
  111 + (uvia_drill 0.127)
  112 + (add_net "")
  113 + (add_net N-0000011)
  114 + (add_net N-0000014)
  115 + (add_net N-000002)
  116 + (add_net N-000004)
  117 + (add_net N-000007)
  118 + (add_net N-000008)
  119 + (add_net N-000009)
  120 + )
  121 +
  122 + (net_class 50_ohms ""
  123 + (clearance 0.15)
  124 + (trace_width 0.6)
  125 + (via_dia 0.6)
  126 + (via_drill 0.3)
  127 + (uvia_dia 0.508)
  128 + (uvia_drill 0.127)
  129 + (add_net N-0000010)
  130 + (add_net N-0000012)
  131 + (add_net N-0000013)
  132 + )
  133 +
  134 + (net_class Alim ""
  135 + (clearance 0.15)
  136 + (trace_width 1)
  137 + (via_dia 0.889)
  138 + (via_drill 0.3)
  139 + (uvia_dia 0.508)
  140 + (uvia_drill 0.127)
  141 + (add_net +5V)
  142 + (add_net VCC)
  143 + (add_net VEE)
  144 + )
  145 +
  146 + (net_class GND ""
  147 + (clearance 0.15)
  148 + (trace_width 0.4)
  149 + (via_dia 0.6)
  150 + (via_drill 0.3)
  151 + (uvia_dia 0.508)
  152 + (uvia_drill 0.127)
  153 + (add_net GND)
  154 + )
  155 +
  156 + (module MY_SMA_EDGE (layer B.Cu) (tedit 54217856) (tstamp 5406FB3D)
  157 + (at 205.15 89.1 270)
  158 + (path /54006970)
  159 + (fp_text reference SMA_E1 (at 1.1 -0.3 360) (layer B.SilkS)
  160 + (effects (font (size 1.524 1.524) (thickness 0.3048)) (justify mirror))
  161 + )
  162 + (fp_text value AC (at 0 -2.54 270) (layer B.SilkS) hide
  163 + (effects (font (size 1.524 1.524) (thickness 0.3048)) (justify mirror))
  164 + )
  165 + (fp_line (start 0 3.8354) (end 0 -3.7846) (layer B.SilkS) (width 0.381))
  166 + (fp_line (start 0 -3.7846) (end 12.7 -3.7846) (layer B.SilkS) (width 0.381))
  167 + (fp_line (start 12.7 -3.7846) (end 12.7 3.8354) (layer B.SilkS) (width 0.381))
  168 + (fp_line (start 12.7 3.8354) (end 0 3.8354) (layer B.SilkS) (width 0.381))
  169 + (pad 0 connect rect (at -2.6035 4.2545 270) (size 4.572 1.524)
  170 + (layers *.Cu B.Mask)
  171 + (net 2 GND)
  172 + )
  173 + (pad 2 connect rect (at -2.54 -4.2545 270) (size 4.572 1.524)
  174 + (layers *.Cu B.Mask)
  175 + (net 2 GND)
  176 + )
  177 + (pad 1 connect rect (at -2.5 0 270) (size 4.5 0.6)
  178 + (layers F.Cu B.Mask)
  179 + (net 12 N-000009)
  180 + )
  181 + (model SMA_EDGE.wrl
  182 + (at (xyz -0.205 -0.05 -0.12))
  183 + (scale (xyz 1.3 1.3 1.3))
  184 + (rotate (xyz 270 0 180))
  185 + )
  186 + )
  187 +
  188 + (module SM0805 (layer F.Cu) (tedit 5451F56B) (tstamp 53FF3486)
  189 + (at 168.45 77.55 180)
  190 + (path /4E5683C8)
  191 + (attr smd)
  192 + (fp_text reference C8 (at 2.35 -0.4 180) (layer F.SilkS)
  193 + (effects (font (size 0.75 0.75) (thickness 0.125)))
  194 + )
  195 + (fp_text value "0.1 uF" (at 0 0.381 180) (layer F.SilkS)
  196 + (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
  197 + )
  198 + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906))
  199 + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906))
  200 + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906))
  201 + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906))
  202 + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906))
  203 + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906))
  204 + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906))
  205 + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397)
  206 + (layers F.Cu F.Paste F.Mask)
  207 + (net 13 VCC)
  208 + )
  209 + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397)
  210 + (layers F.Cu F.Paste F.Mask)
  211 + (net 2 GND)
  212 + )
  213 + (model smd/chip_cms.wrl
  214 + (at (xyz 0 0 0))
  215 + (scale (xyz 0.1 0.1 0.1))
  216 + (rotate (xyz 0 0 0))
  217 + )
  218 + )
  219 +
  220 + (module SM0805 (layer F.Cu) (tedit 5451F45D) (tstamp 53FF3493)
  221 + (at 179.7 75.5 270)
  222 + (path /543E66E0)
  223 + (attr smd)
  224 + (fp_text reference R4 (at -2.35 0.8 270) (layer F.SilkS)
  225 + (effects (font (size 0.7 0.7) (thickness 0.125)))
  226 + )
  227 + (fp_text value 0 (at 0 0.381 270) (layer F.SilkS)
  228 + (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
  229 + )
  230 + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906))
  231 + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906))
  232 + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906))
  233 + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906))
  234 + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906))
  235 + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906))
  236 + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906))
  237 + (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397)
  238 + (layers F.Cu F.Paste F.Mask)
  239 + (net 2 GND)
  240 + )
  241 + (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397)
  242 + (layers F.Cu F.Paste F.Mask)
  243 + (net 4 N-0000011)
  244 + )
  245 + (model smd/chip_cms.wrl
  246 + (at (xyz 0 0 0))
  247 + (scale (xyz 0.1 0.1 0.1))
  248 + (rotate (xyz 0 0 0))
  249 + )
  250 + )
  251 +
  252 + (module SM0805 (layer F.Cu) (tedit 5451F461) (tstamp 53FF34E1)
  253 + (at 177.3 81.65 90)
  254 + (path /4E567D57)
  255 + (attr smd)
  256 + (fp_text reference R5 (at -0.95 1.55 90) (layer F.SilkS)
  257 + (effects (font (size 0.75 0.75) (thickness 0.125095)))
  258 + )
  259 + (fp_text value 1k (at 0 0.381 90) (layer F.SilkS)
  260 + (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
  261 + )
  262 + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906))
  263 + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906))
  264 + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906))
  265 + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906))
  266 + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906))
  267 + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906))
  268 + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906))
  269 + (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397)
  270 + (layers F.Cu F.Paste F.Mask)
  271 + (net 10 N-000007)
  272 + )
  273 + (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397)
  274 + (layers F.Cu F.Paste F.Mask)
  275 + (net 2 GND)
  276 + )
  277 + (model smd/chip_cms.wrl
  278 + (at (xyz 0 0 0))
  279 + (scale (xyz 0.1 0.1 0.1))
  280 + (rotate (xyz 0 0 0))
  281 + )
  282 + )
  283 +
  284 + (module SM0805 (layer F.Cu) (tedit 5451F42C) (tstamp 53FF3515)
  285 + (at 176.55 73.3)
  286 + (path /4E567FC5)
  287 + (attr smd)
  288 + (fp_text reference C11 (at -2.65 -0.8) (layer F.SilkS)
  289 + (effects (font (size 0.7 0.7) (thickness 0.125)))
  290 + )
  291 + (fp_text value "0.1 uF" (at 0 0.381) (layer F.SilkS)
  292 + (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
  293 + )
  294 + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906))
  295 + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906))
  296 + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906))
  297 + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906))
  298 + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906))
  299 + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906))
  300 + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906))
  301 + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397)
  302 + (layers F.Cu F.Paste F.Mask)
  303 + (net 2 GND)
  304 + )
  305 + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397)
  306 + (layers F.Cu F.Paste F.Mask)
  307 + (net 14 VEE)
  308 + )
  309 + (model smd/chip_cms.wrl
  310 + (at (xyz 0 0 0))
  311 + (scale (xyz 0.1 0.1 0.1))
  312 + (rotate (xyz 0 0 0))
  313 + )
  314 + )
  315 +
  316 + (module 1PIN_SMD (layer F.Cu) (tedit 5451EF3C) (tstamp 5451EF2C)
  317 + (at 175.8 55.9)
  318 + (descr "module 1 pin (ou trou mecanique de percage)")
  319 + (tags DEV)
  320 + (path /4E568440)
  321 + (fp_text reference GND (at 4.6 0.1 90) (layer F.SilkS)
  322 + (effects (font (size 1.016 1.016) (thickness 0.254)))
  323 + )
  324 + (fp_text value CONN_1 (at 0.24892 3.74904) (layer F.SilkS)
  325 + (effects (font (size 1.016 1.016) (thickness 0.254)))
  326 + )
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  328 + (fp_line (start 2.49936 -2.49936) (end 2.49936 2.49936) (layer F.SilkS) (width 0.381))
  329 + (fp_line (start 2.49936 2.49936) (end -2.49936 2.49936) (layer F.SilkS) (width 0.381))
  330 + (fp_line (start -2.49936 2.49936) (end -2.49936 -2.49936) (layer F.SilkS) (width 0.381))
  331 + (pad 1 smd rect (at 0 0) (size 4.064 4.064)
  332 + (layers F.Cu F.Paste F.SilkS F.Mask)
  333 + (net 2 GND)
  334 + )
  335 + )
  336 +
  337 + (module 1PIN_SMD (layer F.Cu) (tedit 5451EF47) (tstamp 54097605)
  338 + (at 208.1 56.15)
  339 + (descr "module 1 pin (ou trou mecanique de percage)")
  340 + (tags DEV)
  341 + (path /4E567E0E)
  342 + (fp_text reference V+ (at -3.45 -0.25 90) (layer F.SilkS)
  343 + (effects (font (size 1.016 1.016) (thickness 0.254)))
  344 + )
  345 + (fp_text value CONN_1 (at 0.24892 3.74904) (layer F.SilkS)
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  350 + (fp_line (start 2.49936 2.49936) (end -2.49936 2.49936) (layer F.SilkS) (width 0.381))
  351 + (fp_line (start -2.49936 2.49936) (end -2.49936 -2.49936) (layer F.SilkS) (width 0.381))
  352 + (pad 1 smd rect (at 0 0) (size 4.064 4.064)
  353 + (layers F.Cu F.Paste F.SilkS F.Mask)
  354 + (net 13 VCC)
  355 + )
  356 + )
  357 +
  358 + (module 1PIN_SMD (layer F.Cu) (tedit 5451F37C) (tstamp 5451F408)
  359 + (at 168.35 55.9)
  360 + (descr "module 1 pin (ou trou mecanique de percage)")
  361 + (tags DEV)
  362 + (path /4E567FD6)
  363 + (fp_text reference V- (at 3.6 0.15 90) (layer F.SilkS)
  364 + (effects (font (size 1.016 1.016) (thickness 0.254)))
  365 + )
  366 + (fp_text value CONN_1 (at 0.24892 3.74904) (layer F.SilkS)
  367 + (effects (font (size 1.016 1.016) (thickness 0.254)))
  368 + )
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  370 + (fp_line (start 2.49936 -2.49936) (end 2.49936 2.49936) (layer F.SilkS) (width 0.381))
  371 + (fp_line (start 2.49936 2.49936) (end -2.49936 2.49936) (layer F.SilkS) (width 0.381))
  372 + (fp_line (start -2.49936 2.49936) (end -2.49936 -2.49936) (layer F.SilkS) (width 0.381))
  373 + (pad 1 smd rect (at 0 0) (size 4.064 4.064)
  374 + (layers F.Cu F.Paste F.SilkS F.Mask)
  375 + (net 14 VEE)
  376 + )
  377 + )
  378 +
  379 + (module SM0805 (layer F.Cu) (tedit 5451F570) (tstamp 53FF342B)
  380 + (at 168.45 75.55 180)
  381 + (path /53FF12EF)
  382 + (attr smd)
  383 + (fp_text reference C7 (at 2.35 -0.35 180) (layer F.SilkS)
  384 + (effects (font (size 0.75 0.75) (thickness 0.125)))
  385 + )
  386 + (fp_text value "1 uF" (at 0 0.381 180) (layer F.SilkS)
  387 + (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
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  390 + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906))
  391 + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906))
  392 + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906))
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  394 + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906))
  395 + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906))
  396 + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397)
  397 + (layers F.Cu F.Paste F.Mask)
  398 + (net 13 VCC)
  399 + )
  400 + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397)
  401 + (layers F.Cu F.Paste F.Mask)
  402 + (net 2 GND)
  403 + )
  404 + (model smd/chip_cms.wrl
  405 + (at (xyz 0 0 0))
  406 + (scale (xyz 0.1 0.1 0.1))
  407 + (rotate (xyz 0 0 0))
  408 + )
  409 + )
  410 +
  411 + (module SM0805 (layer F.Cu) (tedit 5451F35F) (tstamp 540975D7)
  412 + (at 204.4 65.35 180)
  413 + (path /4E5675C2)
  414 + (attr smd)
  415 + (fp_text reference C2 (at -2.6 0 180) (layer F.SilkS)
  416 + (effects (font (size 0.7 0.7) (thickness 0.125)))
  417 + )
  418 + (fp_text value "0.1 uF" (at 0 0.381 180) (layer F.SilkS)
  419 + (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
  420 + )
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  422 + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906))
  423 + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906))
  424 + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906))
  425 + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906))
  426 + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906))
  427 + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906))
  428 + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397)
  429 + (layers F.Cu F.Paste F.Mask)
  430 + (net 13 VCC)
  431 + )
  432 + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397)
  433 + (layers F.Cu F.Paste F.Mask)
  434 + (net 2 GND)
  435 + )
  436 + (model smd/chip_cms.wrl
  437 + (at (xyz 0 0 0))
  438 + (scale (xyz 0.1 0.1 0.1))
  439 + (rotate (xyz 0 0 0))
  440 + )
  441 + )
  442 +
  443 + (module SM0805 (layer F.Cu) (tedit 5451F431) (tstamp 53FF346C)
  444 + (at 176.55 71.25)
  445 + (path /53FF12F5)
  446 + (attr smd)
  447 + (fp_text reference C12 (at -2.65 -0.75) (layer F.SilkS)
  448 + (effects (font (size 0.7 0.7) (thickness 0.125)))
  449 + )
  450 + (fp_text value "1 uF" (at 0 0.381) (layer F.SilkS)
  451 + (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
  452 + )
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  454 + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906))
  455 + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906))
  456 + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906))
  457 + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906))
  458 + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906))
  459 + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906))
  460 + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397)
  461 + (layers F.Cu F.Paste F.Mask)
  462 + (net 2 GND)
  463 + )
  464 + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397)
  465 + (layers F.Cu F.Paste F.Mask)
  466 + (net 14 VEE)
  467 + )
  468 + (model smd/chip_cms.wrl
  469 + (at (xyz 0 0 0))
  470 + (scale (xyz 0.1 0.1 0.1))
  471 + (rotate (xyz 0 0 0))
  472 + )
  473 + )
  474 +
  475 + (module SM0805 (layer F.Cu) (tedit 5451F365) (tstamp 53FF34AD)
  476 + (at 206.35 67.5)
  477 + (path /4E5675D0)
  478 + (attr smd)
  479 + (fp_text reference R1 (at -2.55 -0.05) (layer F.SilkS)
  480 + (effects (font (size 0.7 0.7) (thickness 0.125)))
  481 + )
  482 + (fp_text value 158 (at 0 0.381) (layer F.SilkS)
  483 + (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
  484 + )
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  486 + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906))
  487 + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906))
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  489 + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906))
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  491 + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906))
  492 + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397)
  493 + (layers F.Cu F.Paste F.Mask)
  494 + (net 13 VCC)
  495 + )
  496 + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397)
  497 + (layers F.Cu F.Paste F.Mask)
  498 + (net 3 N-0000010)
  499 + )
  500 + (model smd/chip_cms.wrl
  501 + (at (xyz 0 0 0))
  502 + (scale (xyz 0.1 0.1 0.1))
  503 + (rotate (xyz 0 0 0))
  504 + )
  505 + )
  506 +
  507 + (module SM0805 (layer F.Cu) (tedit 5451F2CA) (tstamp 53FF34BA)
  508 + (at 185.7 57.75 180)
  509 + (path /4E567D2A)
  510 + (attr smd)
  511 + (fp_text reference R2 (at 2.55 0 180) (layer F.SilkS)
  512 + (effects (font (size 0.7 0.7) (thickness 0.125)))
  513 + )
  514 + (fp_text value 2.5k (at 0 0.381 180) (layer F.SilkS)
  515 + (effects (font (size 0.50038 0.50038) (thickness 0.10922)))
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  519 + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906))
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  522 + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906))
  523 + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906))
  524 + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397)
  525 + (layers F.Cu F.Paste F.Mask)
  526 + (net 1 +5V)
  527 + )
  528 + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397)
  529 + (layers F.Cu F.Paste F.Mask)
  530 + (net 8 N-000002)
  531 + )
  532 + (model smd/chip_cms.wrl
  533 + (at (xyz 0 0 0))
  534 + (scale (xyz 0.1 0.1 0.1))
  535 + (rotate (xyz 0 0 0))
  536 + )
  537 + )
  538 +
  539 + (module MY_SMA_EDGE (layer B.Cu) (tedit 54217856) (tstamp 5406FB92)
  540 + (at 173.65 89.05 270)
  541 + (path /54006961)
  542 + (fp_text reference SMA_E2 (at 1.1 -0.3 360) (layer B.SilkS)
  543 + (effects (font (size 1.524 1.524) (thickness 0.3048)) (justify mirror))
  544 + )
  545 + (fp_text value DC (at 0 -2.54 270) (layer B.SilkS) hide
  546 + (effects (font (size 1.524 1.524) (thickness 0.3048)) (justify mirror))
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  549 + (fp_line (start 0 -3.7846) (end 12.7 -3.7846) (layer B.SilkS) (width 0.381))
  550 + (fp_line (start 12.7 -3.7846) (end 12.7 3.8354) (layer B.SilkS) (width 0.381))
  551 + (fp_line (start 12.7 3.8354) (end 0 3.8354) (layer B.SilkS) (width 0.381))
  552 + (pad 0 connect rect (at -2.6035 4.2545 270) (size 4.572 1.524)
  553 + (layers *.Cu B.Mask)
  554 + (net 2 GND)
  555 + )
  556 + (pad 2 connect rect (at -2.54 -4.2545 270) (size 4.572 1.524)
  557 + (layers *.Cu B.Mask)
  558 + (net 2 GND)
  559 + )
  560 + (pad 1 connect rect (at -2.5 0 270) (size 4.5 0.6)
  561 + (layers F.Cu B.Mask)
  562 + (net 9 N-000004)
  563 + )
  564 + (model SMA_EDGE.wrl
  565 + (at (xyz -0.205 -0.05 -0.12))
  566 + (scale (xyz 1.3 1.3 1.3))
  567 + (rotate (xyz 270 0 180))
  568 + )
  569 + )
  570 +
  571 + (module 1PIN_SMALL_SMD (layer F.Cu) (tedit 5451F185) (tstamp 543FDB4C)
  572 + (at 169.35 81.3 270)
  573 + (descr "module 1 pin (ou trou mecanique de percage)")
  574 + (tags DEV)
  575 + (path /543F8102)
  576 + (fp_text reference P5 (at 1.25 2.2 360) (layer F.SilkS)
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  581 + )
  582 + (pad 1 smd rect (at 0 0 270) (size 1.6 2)
  583 + (layers F.Cu F.Paste F.SilkS F.Mask)
  584 + (net 2 GND)
  585 + )
  586 + )
  587 +
  588 + (module PHOTODIODES (layer B.Cu) (tedit 543F6C5A) (tstamp 53FF33E6)
  589 + (at 184.75 67.3)
  590 + (path /530336D3)
  591 + (fp_text reference D1 (at -5.6515 -5.715) (layer B.SilkS)
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  599 + (pad 3 thru_hole oval (at 0 1.125) (size 1.25 2) (drill 0.6 (offset 0 0.5))
  600 + (layers *.Cu *.Mask B.SilkS)
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  603 + (pad 2 thru_hole oval (at 1.125 0) (size 2 1.25) (drill 0.6 (offset 0.5 0))
  604 + (layers *.Cu *.Mask B.SilkS)
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  608 + (layers *.Cu *.Mask B.SilkS)
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  616 + (layers *.Cu *.Mask B.SilkS)
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  619 + (pad 1 thru_hole oval (at 0 -2.5 180) (size 1.25 2) (drill 0.6 (offset 0 0.5))
  620 + (layers *.Cu *.Mask B.SilkS)
  621 + (net 8 N-000002)
  622 + )
  623 + )
  624 +
  625 + (module CD542 (layer F.Cu) (tedit 5452105D) (tstamp 5406FB86)
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  627 + (path /5406E05D)
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  813 + (path /53038A04)
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  844 + (at 192.7 57.1 90)
  845 + (descr "module CMS SOT223 4 pins")
  846 + (tags "CMS SOT")
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  884 + )
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  887 + (at 174.35 77.1 90)
  888 + (descr "Module CMS SOJ 8 pins large")
  889 + (tags "CMS SOJ")
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  976 +
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  1 +(export (version D)
  2 + (design
  3 + (source /home/benny/cad/kicad/FGA01FC/FGA01FC.sch)
  4 + (date "Wed Nov 9 15:50:57 2016")
  5 + (tool "Eeschema 4.0.4+dfsg1-stable")
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  7 + (title_block
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  9 + (company)
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  11 + (date "30 oct 2014")
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  13 + (comment (number 1) (value ""))
  14 + (comment (number 2) (value ""))
  15 + (comment (number 3) (value ""))
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  229 + (pin (num 6) (name RF&DC) (type passive))))
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  235 + (fp C_????)
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  252 + (footprints
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  255 + (fp C_Radial*)
  256 + (fp c_elec*)
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  259 + (fp CP*))
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  272 + (pin (num 2) (name GND) (type passive))
  273 + (pin (num 3) (name Out) (type output))
  274 + (pin (num 4) (name GND) (type passive))))
  275 + (libpart (lib MyLib) (part FGA01FC)
  276 + (footprints
  277 + (fp D?)
  278 + (fp S*))
  279 + (fields
  280 + (field (name Reference) PD)
  281 + (field (name Value) FGA01FC))
  282 + (pins
  283 + (pin (num 1) (name Cathode) (type passive))
  284 + (pin (num 2) (name Case) (type passive))
  285 + (pin (num 3) (name Anode) (type passive))))
  286 + (libpart (lib national-semi) (part LM1117)
  287 + (fields
  288 + (field (name Reference) U)
  289 + (field (name Value) LM1117))
  290 + (pins
  291 + (pin (num 1) (name GND) (type input))
  292 + (pin (num 2) (name Output) (type power_out))
  293 + (pin (num 3) (name Input) (type input))
  294 + (pin (num 4) (name Output) (type power_out))))
  295 + (libpart (lib MyLib) (part OP27)
  296 + (fields
  297 + (field (name Reference) U)
  298 + (field (name Value) OP27))
  299 + (pins
  300 + (pin (num 2) (name -) (type input))
  301 + (pin (num 3) (name +) (type input))
  302 + (pin (num 4) (name V-) (type passive))
  303 + (pin (num 6) (name ~) (type output))
  304 + (pin (num 7) (name V+) (type passive))))
  305 + (libpart (lib device) (part R)
  306 + (description Resistor)
  307 + (footprints
  308 + (fp R_*)
  309 + (fp Resistor_*))
  310 + (fields
  311 + (field (name Reference) R)
  312 + (field (name Value) R))
  313 + (pins
  314 + (pin (num 1) (name ~) (type passive))
  315 + (pin (num 2) (name ~) (type passive))))
  316 + (libpart (lib sma_edge) (part SMA_EDGE)
  317 + (fields
  318 + (field (name Reference) SMA_E)
  319 + (field (name Value) SMA_EDGE))
  320 + (pins
  321 + (pin (num 0) (name GND) (type power_in))
  322 + (pin (num 1) (name SIGNAL) (type BiDi))
  323 + (pin (num 2) (name GND) (type power_in)))))
  324 + (libraries
  325 + (library (logical FGA01FC-cache)
  326 + (uri /home/benny/cad/kicad/FGA01FC/FGA01FC-cache.lib))
  327 + (library (logical sma_edge)
  328 + (uri /home/benny/cad/kicad/my_schematic_lib/sma_edge.lib))
  329 + (library (logical Mini-Circuits)
  330 + (uri /home/benny/cad/kicad/my_schematic_lib/Mini-Circuits.lib))
  331 + (library (logical national-semi)
  332 + (uri /home/benny/cad/kicad/my_schematic_lib/national-semi.lib))
  333 + (library (logical MyLib)
  334 + (uri /home/benny/cad/kicad/my_schematic_lib/MyLib.lib))
  335 + (library (logical device)
  336 + (uri /usr/share/kicad/library/device.lib)))
  337 + (nets
  338 + (net (code 1) (name "Net-(C5-Pad1)")
  339 + (node (ref R2) (pin 2))
  340 + (node (ref C5) (pin 1))
  341 + (node (ref C6) (pin 1))
  342 + (node (ref D1) (pin 1)))
  343 + (net (code 2) (name +5V)
  344 + (node (ref R2) (pin 1))
  345 + (node (ref C10) (pin 1))
  346 + (node (ref U4) (pin 2))
  347 + (node (ref U4) (pin 4)))
  348 + (net (code 3) (name GND)
  349 + (node (ref U2) (pin 2))
  350 + (node (ref R3) (pin 1))
  351 + (node (ref C2) (pin 2))
  352 + (node (ref D1) (pin 2))
  353 + (node (ref R5) (pin 2))
  354 + (node (ref U2) (pin 4))
  355 + (node (ref GND1) (pin 1))
  356 + (node (ref SMA_E2) (pin 0))
  357 + (node (ref C12) (pin 1))
  358 + (node (ref C7) (pin 2))
  359 + (node (ref R4) (pin 1))
  360 + (node (ref P5) (pin 1))
  361 + (node (ref C6) (pin 2))
  362 + (node (ref C14) (pin 1))
  363 + (node (ref C13) (pin 2))
  364 + (node (ref C1) (pin 2))
  365 + (node (ref SMA_E1) (pin 2))
  366 + (node (ref SMA_E1) (pin 0))
  367 + (node (ref SMA_E2) (pin 2))
  368 + (node (ref C11) (pin 1))
  369 + (node (ref C8) (pin 2))
  370 + (node (ref C5) (pin 2))
  371 + (node (ref U4) (pin 1))
  372 + (node (ref C9) (pin 2))
  373 + (node (ref C10) (pin 2)))
  374 + (net (code 4) (name VCC)
  375 + (node (ref V+1) (pin 1))
  376 + (node (ref U5) (pin 7))
  377 + (node (ref C8) (pin 1))
  378 + (node (ref C9) (pin 1))
  379 + (node (ref C1) (pin 1))
  380 + (node (ref C13) (pin 1))
  381 + (node (ref C7) (pin 1))
  382 + (node (ref U4) (pin 3))
  383 + (node (ref R1) (pin 1))
  384 + (node (ref C2) (pin 1)))
  385 + (net (code 5) (name "Net-(C15-Pad2)")
  386 + (node (ref R5) (pin 1))
  387 + (node (ref R6) (pin 2))
  388 + (node (ref C15) (pin 2))
  389 + (node (ref U5) (pin 2)))
  390 + (net (code 6) (name "Net-(C15-Pad1)")
  391 + (node (ref U5) (pin 6))
  392 + (node (ref C15) (pin 1))
  393 + (node (ref SMA_E2) (pin 1))
  394 + (node (ref R6) (pin 1)))
  395 + (net (code 7) (name "Net-(C4-Pad2)")
  396 + (node (ref C4) (pin 2))
  397 + (node (ref U2) (pin 3))
  398 + (node (ref U1) (pin 6)))
  399 + (net (code 8) (name "Net-(R4-Pad2)")
  400 + (node (ref R4) (pin 2))
  401 + (node (ref U5) (pin 3))
  402 + (node (ref R7) (pin 2)))
  403 + (net (code 9) (name "Net-(R1-Pad2)")
  404 + (node (ref U1) (pin 3))
  405 + (node (ref R1) (pin 2)))
  406 + (net (code 10) (name "Net-(C3-Pad1)")
  407 + (node (ref C3) (pin 1))
  408 + (node (ref D1) (pin 3))
  409 + (node (ref U3) (pin 6))
  410 + (node (ref R3) (pin 2)))
  411 + (net (code 11) (name "Net-(C3-Pad2)")
  412 + (node (ref U2) (pin 1))
  413 + (node (ref C3) (pin 2)))
  414 + (net (code 12) (name "Net-(C4-Pad1)")
  415 + (node (ref C4) (pin 1))
  416 + (node (ref SMA_E1) (pin 1)))
  417 + (net (code 13) (name "Net-(R7-Pad1)")
  418 + (node (ref U3) (pin 3))
  419 + (node (ref R7) (pin 1)))
  420 + (net (code 14) (name VEE)
  421 + (node (ref C12) (pin 2))
  422 + (node (ref V-1) (pin 1))
  423 + (node (ref C14) (pin 2))
  424 + (node (ref U5) (pin 4))
  425 + (node (ref C11) (pin 2)))))
0 426 \ No newline at end of file
... ... @@ -0,0 +1,99 @@
  1 +update=Wed Nov 9 09:30:53 2016
  2 +version=1
  3 +last_client=kicad
  4 +[general]
  5 +version=1
  6 +[pcbnew]
  7 +version=1
  8 +LastNetListRead=FGA01FC.net
  9 +UseCmpFile=1
  10 +PadDrill=0.000000000000
  11 +PadDrillOvalY=0.000000000000
  12 +PadSizeH=1.016000000000
  13 +PadSizeV=2.032000000000
  14 +PcbTextSizeV=1.500000000000
  15 +PcbTextSizeH=1.500000000000
  16 +PcbTextThickness=0.300000000000
  17 +ModuleTextSizeV=1.500000000000
  18 +ModuleTextSizeH=1.500000000000
  19 +ModuleTextSizeThickness=0.150000000000
  20 +SolderMaskClearance=0.200000000000
  21 +SolderMaskMinWidth=0.000000000000
  22 +DrawSegmentWidth=0.200000000000
  23 +BoardOutlineThickness=0.150000000000
  24 +ModuleOutlineThickness=0.150000000000
  25 +[pcbnew/libraries]
  26 +LibName1=sockets
  27 +LibName2=connect
  28 +LibName3=discret
  29 +LibName4=pin_array
  30 +LibName5=divers
  31 +LibName6=smd_capacitors
  32 +LibName7=smd_resistors
  33 +LibName8=smd_transistors
  34 +LibName9=libcms
  35 +LibName10=display
  36 +LibName11=led
  37 +LibName12=dip_sockets
  38 +LibName13=pga_sockets
  39 +LibName14=valves
  40 +LibName15=Choke_SMD_RevB_28July2010
  41 +LibName16=inductances
  42 +LibName17=mini_circuit
  43 +LibName18=misc
  44 +LibName19=MyFootPrint
  45 +LibName20=TantalCapacitors_SMD_RevA_28Aug2012
  46 +LibName21=sma
  47 +LibDir=/home/benny/cad/kicad/my_footprint_lib
  48 +[cvpcb]
  49 +version=1
  50 +NetIExt=net
  51 +[cvpcb/libraries]
  52 +EquName1=devcms
  53 +[eeschema]
  54 +version=1
  55 +LibDir=/home/benny/cad/kicad/my_schematic_lib
  56 +[eeschema/libraries]
  57 +LibName1=FGA01FC-rescue
  58 +LibName2=power
  59 +LibName3=device
  60 +LibName4=transistors
  61 +LibName5=conn
  62 +LibName6=linear
  63 +LibName7=regul
  64 +LibName8=74xx
  65 +LibName9=cmos4000
  66 +LibName10=adc-dac
  67 +LibName11=memory
  68 +LibName12=xilinx
  69 +LibName13=special
  70 +LibName14=microcontrollers
  71 +LibName15=dsp
  72 +LibName16=microchip
  73 +LibName17=analog_switches
  74 +LibName18=motorola
  75 +LibName19=texas
  76 +LibName20=intel
  77 +LibName21=audio
  78 +LibName22=interface
  79 +LibName23=digital-audio
  80 +LibName24=philips
  81 +LibName25=display
  82 +LibName26=cypress
  83 +LibName27=siliconi
  84 +LibName28=opto
  85 +LibName29=atmel
  86 +LibName30=contrib
  87 +LibName31=valves
  88 +LibName32=MyLib
  89 +LibName33=analog_design
  90 +LibName34=avago
  91 +LibName35=fig_schematic
  92 +LibName36=maxim
  93 +LibName37=micrel
  94 +LibName38=microchip_p
  95 +LibName39=Mini-Circuits
  96 +LibName40=misc
  97 +LibName41=national-semi
  98 +LibName42=ST
  99 +LibName43=sma_edge
Diff suppressed. Click to show
... ... @@ -0,0 +1,1018 @@
  1 +EESchema Schematic File Version 2
  2 +LIBS:FGA01FC-rescue
  3 +LIBS:power
  4 +LIBS:device
  5 +LIBS:transistors
  6 +LIBS:conn
  7 +LIBS:linear
  8 +LIBS:regul
  9 +LIBS:74xx
  10 +LIBS:cmos4000
  11 +LIBS:adc-dac
  12 +LIBS:memory
  13 +LIBS:xilinx
  14 +LIBS:microcontrollers
  15 +LIBS:dsp
  16 +LIBS:microchip
  17 +LIBS:analog_switches
  18 +LIBS:motorola
  19 +LIBS:texas
  20 +LIBS:intel
  21 +LIBS:audio
  22 +LIBS:interface
  23 +LIBS:digital-audio
  24 +LIBS:philips
  25 +LIBS:display
  26 +LIBS:cypress
  27 +LIBS:siliconi
  28 +LIBS:opto
  29 +LIBS:atmel
  30 +LIBS:contrib
  31 +LIBS:valves
  32 +LIBS:MyLib
  33 +LIBS:analog_design
  34 +LIBS:avago
  35 +LIBS:fig_schematic
  36 +LIBS:maxim
  37 +LIBS:micrel
  38 +LIBS:microchip_p
  39 +LIBS:Mini-Circuits
  40 +LIBS:misc
  41 +LIBS:national-semi
  42 +LIBS:ST
  43 +LIBS:sma_edge
  44 +LIBS:FGA01FC-cache
  45 +EELAYER 25 0
  46 +EELAYER END
  47 +$Descr A4 11693 8268
  48 +encoding utf-8
  49 +Sheet 1 1
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  51 +Date "30 oct 2014"
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  961 +Connection ~ 9050 4800
  962 +Wire Wire Line
  963 + 7825 5050 8275 5050
  964 +Wire Wire Line
  965 + 7825 4075 7950 4075
  966 +Wire Wire Line
  967 + 3875 2300 3875 2425
  968 +Wire Wire Line
  969 + 7600 6250 7600 6200
  970 +Wire Wire Line
  971 + 7150 6250 7150 6200
  972 +Wire Wire Line
  973 + 7150 5300 7150 5250
  974 +Wire Wire Line
  975 + 7600 5250 7600 5300
  976 +Wire Wire Line
  977 + 7100 3875 7100 3775
  978 +Wire Wire Line
  979 + 7500 875 7500 925
  980 +Wire Wire Line
  981 + 7175 925 7175 875
  982 +Wire Wire Line
  983 + 1975 4225 1475 4225
  984 +Wire Wire Line
  985 + 1475 4225 1475 4350
  986 +Wire Wire Line
  987 + 1975 4375 1975 4325
  988 +Wire Wire Line
  989 + 1475 4650 1475 4750
  990 +Wire Wire Line
  991 + 3525 4775 3525 4825
  992 +Wire Wire Line
  993 + 3775 4275 3775 4225
  994 +Wire Wire Line
  995 + 3475 4275 3775 4275
  996 +Wire Wire Line
  997 + 3525 4475 3525 4275
  998 +Connection ~ 3525 4275
  999 +$Comp
  1000 +L LM1117 U4
  1001 +U 1 1 58236056
  1002 +P 2725 4275
  1003 +F 0 "U4" H 2725 4175 50 0000 C CNN
  1004 +F 1 "LM1117" H 2725 4375 50 0000 C CNN
  1005 +F 2 "" H 2725 4275 60 0000 C CNN
  1006 +F 3 "" H 2725 4275 60 0000 C CNN
  1007 + 1 2725 4275
  1008 + 1 0 0 -1
  1009 +$EndComp
  1010 +Wire Wire Line
  1011 + 8325 875 8500 875
  1012 +Connection ~ 3875 2300
  1013 +Wire Wire Line
  1014 + 5300 2375 5300 2300
  1015 +Connection ~ 5300 2300
  1016 +Wire Wire Line
  1017 + 7275 2300 7600 2300
  1018 +$EndSCHEMATC
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FGA01FC_schematic.pdf
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