bachi / libad9915

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Commit 41fb442f693252f658c2302add9382c99cf4f674

Authored by bachi
1 parent 09ecc607da
Exists in master

ad9915.c et ad9915.h : normalisation des noms de fonctions

Showing 2 changed files with 243 additions and 243 deletions Side-by-side Diff

... ... @@ -54,38 +54,38 @@
54 54  
55 55 //------------ DRCTL
56 56  
57   -void Send_CTRL_UP(int fp);
58   -void Send_CTRL_DOWN(int fp);
59   -void Send_HOLD(int fp);
60   -void Send_UNHOLD(int fp);
  57 +void sendCtrlUp(int fp);
  58 +void SendCtrlDown(int fp);
  59 +void SendHold(int fp);
  60 +void SendUnhold(int fp);
61 61 int testRampFreq(int fd, int f_dds, int fp);
62 62  
63 63 //-------Profile register mode
64 64  
65   -int InitialisationProfile (int fd,int f_dds);
66   -int PutFrequencyAmpPhaseWord(int fd, int f_dds, double fout, double fclk,double amp, double phase);
  65 +int initialisationProfileMode (int fd,int f_dds);
  66 +int putFrequencyAmpPhaseWord(int fd, int f_dds, double fout, double fclk,double amp, double phase);
67 67  
68 68  
69   -int PutFrequencyWord(int fd, int f_dds, double freq);//Attention uniquement valable pour fclk = 1 GHz
70   -int PutPhaseWord(int fd, int f_dds, double phase);
71   -int PutAmpWord(int fd, int f_dds, double amplitude);
  69 +int putFrequencyWord(int fd, int f_dds,double fclk, double freq);
  70 +int putPhaseWord(int fd, int f_dds, double phase);
  71 +int putAmpWord(int fd, int f_dds, double amplitude);
72 72  
73 73 //fonctions rampes hardwres
74 74  
75   -int FrequencySweep (int fd, int f_dds,double fclk,double dfUp, double dfDown, double FreqMax,double FreqMin, double DeltaTimeUp, double DeltaTimeDown);
76   -int ContinueFrequencySweep (int fd, int f_dds,double fclk,double dfUp, double dfDown, double FreqMax,double FreqMin, double DeltaTimeUp, double DeltaTimeDown);
77   -int AmplitudeSweep (int fd, int f_dds,double fclk,double dAUp, double dADown, double AMax,double AMin, double DeltaTimeUp, double DeltaTimeDown);
78   -int ContinueAmplitudeSweep (int fd, int f_dds,double fclk,double dAUp, double dADown, double AMax,double AMin, double DeltaTimeUp, double DeltaTimeDown);
79   -int PhaseSweep (int fd, int f_dds,double fclk,double dphiUp, double dphiDown, double PhiMax,double PhiMin, double DeltaTimeUp, double DeltaTimeDown);
80   -int ContinuePhaseSweep (int fd, int f_dds,double fclk,double dphiUp, double dphiDown, double PhiMax,double PhiMin, double DeltaTimeUp, double DeltaTimeDown);
  75 +int frequencySweep (int fd, int f_dds,double fclk,double dfUp, double dfDown, double FreqMax,double FreqMin, double DeltaTimeUp, double DeltaTimeDown);
  76 +int continueFrequencySweep (int fd, int f_dds,double fclk,double dfUp, double dfDown, double FreqMax,double FreqMin, double DeltaTimeUp, double DeltaTimeDown);
  77 +int amplitudeSweep (int fd, int f_dds,double fclk,double dAUp, double dADown, double AMax,double AMin, double DeltaTimeUp, double DeltaTimeDown);
  78 +int continueAmplitudeSweep (int fd, int f_dds,double fclk,double dAUp, double dADown, double AMax,double AMin, double DeltaTimeUp, double DeltaTimeDown);
  79 +int phaseSweep (int fd, int f_dds,double fclk,double dphiUp, double dphiDown, double PhiMax,double PhiMin, double DeltaTimeUp, double DeltaTimeDown);
  80 +int continuePhaseSweep (int fd, int f_dds,double fclk,double dphiUp, double dphiDown, double PhiMax,double PhiMin, double DeltaTimeUp, double DeltaTimeDown);
81 81  
82 82 //fin fonctions rampes hardwares
83 83  
84 84 // fonctions rampes softwares
85 85  
86   -int RampAmpFromSoft(int fd, int f_dds,double DeltaTimeUp,double AIni, double AFin);
  86 +int rampAmpFromSoft(int fd, int f_dds,double DeltaTimeUp,double AIni, double AFin);
87 87  
88   -int RampPhaseFromSoft(int fd, int f_dds,double DeltaTimeUp,double PhiIni, double PhiFin);
  88 +int rampPhaseFromSoft(int fd, int f_dds,double DeltaTimeUp,double PhiIni, double PhiFin);
89 89  
90 90 // fin fonctoins rampes softwares
91 91  
... ... @@ -7,7 +7,7 @@
7 7  
8 8 #define debug
9 9 //fonction reset
10   -void Send_Reset(int f_dds)
  10 +void sendReset(int f_dds)
11 11 {
12 12 char reset='2';
13 13 write(f_dds,&reset,sizeof(reset)); //reset
... ... @@ -15,7 +15,7 @@
15 15 }
16 16  
17 17 //fonction ioupdate
18   -void Send_IO_Update(int f_dds)
  18 +void sendIOUpdate(int f_dds)
19 19 {
20 20 char update='1';
21 21 write(f_dds,&update,sizeof(update)); //reset
... ... @@ -23,7 +23,7 @@
23 23 }
24 24  
25 25 //fonction write register
26   -void write_register (int fd, unsigned char addr, unsigned char d3, unsigned char d2, unsigned char d1, unsigned char d0)
  26 +void writeRegister (int fd, unsigned char addr, unsigned char d3, unsigned char d2, unsigned char d1, unsigned char d0)
27 27 {
28 28 unsigned char tx[5]={0};
29 29 tx[0]=addr;
... ... @@ -38,7 +38,7 @@
38 38  
39 39 //fonction read register
40 40  
41   -void read_register (int fd,unsigned char addr, uint32_t *readword)
  41 +void readRegister (int fd,unsigned char addr, uint32_t *readword)
42 42 {
43 43 unsigned char tx[1] = {0};
44 44 unsigned char rx[4] = {0};
... ... @@ -54,7 +54,7 @@
54 54 }
55 55  
56 56 //fonction read register
57   -void read_register_ini (int fd, unsigned char addr)
  57 +void readRegisterIni (int fd, unsigned char addr)
58 58 {
59 59 unsigned char tx[1] = {0};
60 60 unsigned char rx[4] = {0};
61 61  
62 62  
63 63  
64 64  
65 65  
66 66  
67 67  
68 68  
... ... @@ -62,58 +62,58 @@
62 62 tx[0]=addr;
63 63 spi_put_multiple(fd,tx,1,rx,4);
64 64 printf("TX:%x RX:%x %x %x %x\n",tx[0],rx[0],rx[1],rx[2],rx[3]);
65   - // Send_IO_Update (f_dds); //Send the update to set the control registers
  65 + // sendIOUpdate (f_dds); //Send the update to set the control registers
66 66 }
67 67  
68 68 //initialisation du dds
69   -void Initialize_DDS (int fd, int f_dds)
  69 +void initializeDDS (int fd, int f_dds)
70 70 {
71   - Send_Reset(f_dds);
72   - write_register(fd,CFRAddress[0],CFR1Start[0], CFR1Start[1], CFR1Start[2], CFR1Start[3]);
73   - Send_IO_Update (f_dds); //Send the update to set the control registers
74   - write_register(fd,CFRAddress[1], CFR2Start[0], CFR2Start[1], CFR2Start[2], CFR2Start[3]);
75   - Send_IO_Update (f_dds);
76   - write_register(fd,CFRAddress[2], CFR3Start[0], CFR3Start[1], CFR3Start[2], CFR3Start[3]);
77   - Send_IO_Update (f_dds);
78   - write_register(fd,CFRAddress[3], CFR4Start[0], CFR4Start[1], CFR4Start[2], CFR4Start[3]);
79   - Send_IO_Update (f_dds);
80   - write_register(fd,USR0Address, 0xA2, 0x00, 0x08, 0x00);
81   - Send_IO_Update (f_dds);
  71 + sendReset(f_dds);
  72 + writeRegister(fd,CFRAddress[0],CFR1Start[0], CFR1Start[1], CFR1Start[2], CFR1Start[3]);
  73 + sendIOUpdate (f_dds); //Send the update to set the control registers
  74 + writeRegister(fd,CFRAddress[1], CFR2Start[0], CFR2Start[1], CFR2Start[2], CFR2Start[3]);
  75 + sendIOUpdate (f_dds);
  76 + writeRegister(fd,CFRAddress[2], CFR3Start[0], CFR3Start[1], CFR3Start[2], CFR3Start[3]);
  77 + sendIOUpdate (f_dds);
  78 + writeRegister(fd,CFRAddress[3], CFR4Start[0], CFR4Start[1], CFR4Start[2], CFR4Start[3]);
  79 + sendIOUpdate (f_dds);
  80 + writeRegister(fd,USR0Address, 0xA2, 0x00, 0x08, 0x00);
  81 + sendIOUpdate (f_dds);
82 82 }
83 83  
84 84 //calibration du dac
85   -void Calibrate_DAC (int fd, int f_dds)
  85 +void calibrateDAC (int fd, int f_dds)
86 86 {
87   - write_register(fd,CFRAddress[3], DACCalEnable[0], DACCalEnable[1], DACCalEnable[2], DACCalEnable[3]);
88   - Send_IO_Update (f_dds);
89   - write_register(fd,CFRAddress[3], CFR4Start[0], CFR4Start[1], CFR4Start[2], CFR4Start[3]);
90   - Send_IO_Update (f_dds);
  87 + writeRegister(fd,CFRAddress[3], DACCalEnable[0], DACCalEnable[1], DACCalEnable[2], DACCalEnable[3]);
  88 + sendIOUpdate (f_dds);
  89 + writeRegister(fd,CFRAddress[3], CFR4Start[0], CFR4Start[1], CFR4Start[2], CFR4Start[3]);
  90 + sendIOUpdate (f_dds);
91 91 }
92 92  
93   -void modulus_setup(int fd, int f_dds)
  93 +void modulusSetup(int fd, int f_dds)
94 94 {
95   - write_register(fd,0x00,0x00, 0x01, 0x01, 0x0a); //OSK enable //0x08
96   - //write_register(fd,0x00,0x00, 0x01, 0x01, 0x08); //OSK enable de base
97   - Send_IO_Update (f_dds);
98   - write_register(fd,0x01,0x00, 0x89, 0x09, 0x00); //enable program modulus and digital ramp
99   - Send_IO_Update (f_dds);
  95 + writeRegister(fd,0x00,0x00, 0x01, 0x01, 0x0a); //OSK enable //0x08
  96 + //writeRegister(fd,0x00,0x00, 0x01, 0x01, 0x08); //OSK enable de base
  97 + sendIOUpdate (f_dds);
  98 + writeRegister(fd,0x01,0x00, 0x89, 0x09, 0x00); //enable program modulus and digital ramp
  99 + sendIOUpdate (f_dds);
100 100 }
101 101  
102   -void basic_setup(int fd, int f_dds,uint16_t ampWord, uint16_t phaseWord)
  102 +void basicSetup(int fd, int f_dds,uint16_t ampWord, uint16_t phaseWord)
103 103 {
104   - write_register(fd,0x00,0x00, 0x01, 0x01, 0x08); //OSK enable
105   - Send_IO_Update (f_dds);
106   - write_register(fd,0x01,0x00, 0x89, 0x09, 0x00); //enable program modulus and digital ramp
107   - Send_IO_Update (f_dds);
108   - write_register(fd,0x04,0x19, 0x99, 0x99, 0x99); //ftw
109   - Send_IO_Update (f_dds);
110   - write_register(fd,0x05,0xC0, 0x00, 0x00, 0x00); //A
111   - Send_IO_Update (f_dds);
112   - write_register(fd,0x06,0x00, 0x00, 0x00, 0x05); //B
113   - Send_IO_Update (f_dds);
114   - //write_register(fd,0x0c, 0x0F, 0xFF, 0x00, 0x00); // amp (12b) ph(16)
115   - write_register(fd,0x0c, (uint8_t)((ampWord>>8) & 0x0F), (uint8_t)(ampWord & 0xFF), (uint8_t)((phaseWord>>8) & 0xFF), (uint8_t)(phaseWord & 0xFF)); // amp (12b) ph(16)
116   - Send_IO_Update (f_dds);
  104 + writeRegister(fd,0x00,0x00, 0x01, 0x01, 0x08); //OSK enable
  105 + sendIOUpdate (f_dds);
  106 + writeRegister(fd,0x01,0x00, 0x89, 0x09, 0x00); //enable program modulus and digital ramp
  107 + sendIOUpdate (f_dds);
  108 + writeRegister(fd,0x04,0x19, 0x99, 0x99, 0x99); //ftw
  109 + sendIOUpdate (f_dds);
  110 + writeRegister(fd,0x05,0xC0, 0x00, 0x00, 0x00); //A
  111 + sendIOUpdate (f_dds);
  112 + writeRegister(fd,0x06,0x00, 0x00, 0x00, 0x05); //B
  113 + sendIOUpdate (f_dds);
  114 + //writeRegister(fd,0x0c, 0x0F, 0xFF, 0x00, 0x00); // amp (12b) ph(16)
  115 + writeRegister(fd,0x0c, (uint8_t)((ampWord>>8) & 0x0F), (uint8_t)(ampWord & 0xFF), (uint8_t)((phaseWord>>8) & 0xFF), (uint8_t)(phaseWord & 0xFF)); // amp (12b) ph(16)
  116 + sendIOUpdate (f_dds);
117 117 }
118 118  
119 119 void setFreqMM(int fd, int f_dds, unsigned int ftw, unsigned int A, unsigned int B)
120 120  
... ... @@ -123,24 +123,24 @@
123 123 //uint16_t ampWord = 0x00000FFF;
124 124 //uint32_t phaseAmpWord = phaseWord | ampWord<<16;
125 125  
126   - //write_register(fd,0x00,0x00, 0x01, 0x01, 0x08); //OSK enable
127   - //Send_IO_Update(f_dds);
128   - //write_register(fd,0x01,0x00, 0x89, 0x09, 0x00); //enable program modulus and digital ramp
129   - //Send_IO_Update(f_dds);
130   - write_register(fd,0x04,ftw>>24&0xFF, ftw>>16&0xFF, ftw>>8&0xFF, ftw&0xFF); //ftw
131   - Send_IO_Update(f_dds);
132   - write_register(fd,0x05,A>>24&0xFF,A>>16&0xFF, A>>8&0xFF, A&0xFF); //A
133   - Send_IO_Update(f_dds);
134   - write_register(fd,0x06,B>>24&0xFF,B>>16&0xFF, B>>8&0xFF, B&0xFF); //B
135   - Send_IO_Update(f_dds);
136   - // write_register(fd,0x0c, phaseAmpWord>>24&0xFF, phaseAmpWord>>16&0xFF,phaseAmpWord>>8&0xFF,phaseAmpWord&0xFF); // amp (12b) ph(16)
137   - //Send_IO_Update(f_dds);
  126 + //writeRegister(fd,0x00,0x00, 0x01, 0x01, 0x08); //OSK enable
  127 + //sendIOUpdate(f_dds);
  128 + //writeRegister(fd,0x01,0x00, 0x89, 0x09, 0x00); //enable program modulus and digital ramp
  129 + //sendIOUpdate(f_dds);
  130 + writeRegister(fd,0x04,ftw>>24&0xFF, ftw>>16&0xFF, ftw>>8&0xFF, ftw&0xFF); //ftw
  131 + sendIOUpdate(f_dds);
  132 + writeRegister(fd,0x05,A>>24&0xFF,A>>16&0xFF, A>>8&0xFF, A&0xFF); //A
  133 + sendIOUpdate(f_dds);
  134 + writeRegister(fd,0x06,B>>24&0xFF,B>>16&0xFF, B>>8&0xFF, B&0xFF); //B
  135 + sendIOUpdate(f_dds);
  136 + // writeRegister(fd,0x0c, phaseAmpWord>>24&0xFF, phaseAmpWord>>16&0xFF,phaseAmpWord>>8&0xFF,phaseAmpWord&0xFF); // amp (12b) ph(16)
  137 + //sendIOUpdate(f_dds);
138 138 }
139 139  
140 140 void setAmpPhaseWord(int fd, int f_dds,unsigned int phaseAmpWord)
141 141 {
142   - write_register(fd,0x0c, phaseAmpWord>>24&0xFF, phaseAmpWord>>16&0xFF,phaseAmpWord>>8&0xFF,phaseAmpWord&0xFF); // amp (12b) ph(16)
143   - Send_IO_Update(f_dds);
  142 + writeRegister(fd,0x0c, phaseAmpWord>>24&0xFF, phaseAmpWord>>16&0xFF,phaseAmpWord>>8&0xFF,phaseAmpWord&0xFF); // amp (12b) ph(16)
  143 + sendIOUpdate(f_dds);
144 144 }
145 145  
146 146 /*
... ... @@ -148,7 +148,7 @@
148 148 {
149 149 // unsigned char rx[5]={0};
150 150 unsigned char* pt;
151   - read_register(fd,0x0c,rx); // amp (12b) ph(16)
  151 + readRegister(fd,0x0c,rx); // amp (12b) ph(16)
152 152 rx[0]=*pt;
153 153 rx[1]=*(pt+1);
154 154 rx[2]=*(pt+2);
155 155  
156 156  
157 157  
... ... @@ -205,28 +205,28 @@
205 205 return EXIT_SUCCESS;
206 206 }
207 207  
208   -void Send_CTRL_UP(int fp)
  208 +void sendCtrlUp(int fp)
209 209 {
210 210 char DRCTLOn='0';//pente positive
211 211 write(fp,&DRCTLOn,sizeof(DRCTLOn)); //
212 212 sleep(0.1);
213 213 }
214 214  
215   -void Send_CTRL_DOWN(int fp)
  215 +void sendCtrlDown(int fp)
216 216 {
217 217 char DRCTLOn='2';//pente negative
218 218 write(fp,&DRCTLOn,sizeof(DRCTLOn)); //reset
219 219 sleep(0.1);
220 220 }
221 221  
222   -void Send_HOLD(int fp)
  222 +void sendHold(int fp)
223 223 {
224 224 char DRHOLDOn ='1';//rampe bloquée
225 225 write(fp,&DRHOLDOn,sizeof(DRHOLDOn)); //reset
226 226 sleep(0.1);
227 227 }
228 228  
229   -void Send_UNHOLD(int fp)
  229 +void sendUnhold(int fp)
230 230 {
231 231 char DRHOLDOn ='3';//rampe debloquée
232 232 write(fp,&DRHOLDOn,sizeof(DRHOLDOn)); //reset
233 233  
234 234  
235 235  
... ... @@ -239,20 +239,20 @@
239 239  
240 240  
241 241 //3-Rampe de pente positive + debloquage
242   - Send_CTRL_DOWN(fp);//rampe up
243   - Send_UNHOLD(fp);
  242 + sendCtrlDown(fp);//rampe up
  243 + sendUnhold(fp);
244 244  
245   - Send_Reset(f_dds);
  245 + sendReset(f_dds);
246 246 //Initialize_DDS (fd, f_dds);
247 247  
248 248 //0- paramètre de bases
249   - write_register(fd,0x00,0x00,0x01,0x01,0x0a);//OSKenable+Read&write
250   - Send_IO_Update(f_dds);
251   - read_register_ini(fd,0x00);
  249 + writeRegister(fd,0x00,0x00,0x01,0x01,0x0a);//OSKenable+Read&write
  250 + sendIOUpdate(f_dds);
  251 + readRegisterIni(fd,0x00);
252 252  
253   - write_register(fd,0x01,0x00, 0x00, 0x09, 0x00); // enable amp ramp
254   - Send_IO_Update(f_dds);
255   - read_register_ini(fd,0x00);
  253 + writeRegister(fd,0x01,0x00, 0x00, 0x09, 0x00); // enable amp ramp
  254 + sendIOUpdate(f_dds);
  255 + readRegisterIni(fd,0x00);
256 256  
257 257 //1- Donner une frequence f_dds de 1.1e7 Hz sachant que f_clk=1e9 Hz;
258 258 // => Le mot a donner est (p.19) : FTW=(f_dds/f_clk)*2³²
259 259  
260 260  
... ... @@ -265,16 +265,16 @@
265 265  
266 266  
267 267  
268   - write_register(fd,0x0b,0x02,0xd0,0xe5,0x60);//mot de frequence
269   - Send_IO_Update(f_dds);
270   - write_register(fd,0x0c,0x0F,0xFF,0x00,0x00); //mot de amp et de phase : amp max, phase nulle
271   - Send_IO_Update(f_dds);
  268 + writeRegister(fd,0x0b,0x02,0xd0,0xe5,0x60);//mot de frequence
  269 + sendIOUpdate(f_dds);
  270 + writeRegister(fd,0x0c,0x0F,0xFF,0x00,0x00); //mot de amp et de phase : amp max, phase nulle
  271 + sendIOUpdate(f_dds);
272 272  
273 273 printf("Les mots de frequences, d'amplitudes et de phases sont envoyes\n");
274 274 printf("Lecture registre de frequence: 0x0b\n");
275   - read_register_ini(fd,0x0b);
  275 + readRegisterIni(fd,0x0b);
276 276 printf("Lecture registre de amp et phase: 0x0c\n");
277   - read_register_ini(fd,0x0c);
  277 + readRegisterIni(fd,0x0c);
278 278  
279 279 Calibrate_DAC (fd,f_dds);
280 280 printf("\n\n ----------------------- \n\n");
281 281  
... ... @@ -283,12 +283,12 @@
283 283 /*
284 284 //2- Taille des dt
285 285  
286   - write_register(fd,0x08,0xFF,0xFF,0xFF,0xFF); //+dt max, -dt max (+dt = -dt)
287   - Send_IO_Update(f_dds);
  286 + writeRegister(fd,0x08,0xFF,0xFF,0xFF,0xFF); //+dt max, -dt max (+dt = -dt)
  287 + sendIOUpdate(f_dds);
288 288  
289 289 printf("Les mots de dt sont envoyes\n");
290 290 printf("Lecture dans le registre 0x08 : taille dt\n");
291   - read_register_ini (fd,0x08);
  291 + readRegisterIni (fd,0x08);
292 292  
293 293  
294 294  
295 295  
296 296  
297 297  
298 298  
... ... @@ -299,30 +299,30 @@
299 299 //3- STEP SIZE :dphi
300 300  
301 301 // en theorie dphi =2.25e-28 degrees
302   - write_register(fd,0x06,0x00,0x00,0x00,0x01);
303   - Send_IO_Update(f_dds);
  302 + writeRegister(fd,0x06,0x00,0x00,0x00,0x01);
  303 + sendIOUpdate(f_dds);
304 304  
305   - write_register(fd,0x07,0x00,0x00,0x00,0x01);
306   - Send_IO_Update(f_dds);
  305 + writeRegister(fd,0x07,0x00,0x00,0x00,0x01);
  306 + sendIOUpdate(f_dds);
307 307  
308 308 //printf("\n\n ----------------------- \n\n");
309 309 printf("Les mots de dphi sont envoyes\n");
310 310 printf("Lecture dans les registres 0x06 et 0x07 : taille dt\n");
311   - read_register_ini (fd,0x06);
312   - read_register_ini (fd,0x07);
  311 + readRegisterIni (fd,0x06);
  312 + readRegisterIni (fd,0x07);
313 313  
314 314 printf("\n\n ----------------------- \n\n");
315 315 //4- Ecrire les extremums de la rampe
316 316  
317   - write_register(fd,0x04,0x00,0x00,0x00,0x01);//0 rad
318   - Send_IO_Update(f_dds);
319   - write_register(fd,0x05,0xFF,0xFF,0xFF,0xFF);//2*pi rad
320   - Send_IO_Update(f_dds);
  317 + writeRegister(fd,0x04,0x00,0x00,0x00,0x01);//0 rad
  318 + sendIOUpdate(f_dds);
  319 + writeRegister(fd,0x05,0xFF,0xFF,0xFF,0xFF);//2*pi rad
  320 + sendIOUpdate(f_dds);
321 321  
322 322 printf("Les mots des frontieres sont envoyes\n");
323 323 printf("Lecture dans les registres 0x04 et 0x05 : taille dt\n");
324   - read_register_ini (fd,0x04);
325   - read_register_ini (fd,0x05);
  324 + readRegisterIni (fd,0x04);
  325 + readRegisterIni (fd,0x05);
326 326  
327 327  
328 328 //3-Rampe de pente positive ou négative
329 329  
330 330  
... ... @@ -330,14 +330,14 @@
330 330  
331 331  
332 332 //4-ecriture dans le registre 0x01
333   - write_register(fd,0x01,0x00, 0xa8, 0x09, 0x00); // enable amp ramp
334   - Send_IO_Update(f_dds);
  333 + writeRegister(fd,0x01,0x00, 0xa8, 0x09, 0x00); // enable amp ramp
  334 + sendIOUpdate(f_dds);
335 335  
336 336 printf("Lecture dans le registre 0x01 : \n");
337   - read_register_ini (fd,0x01);
  337 + readRegisterIni (fd,0x01);
338 338 // printf("Les mots de dt sont envoyes\n");
339 339 printf("Lecture dans le registre 0x08 : taille dt\n");
340   - read_register_ini (fd,0x08);
  340 + readRegisterIni (fd,0x08);
341 341  
342 342  
343 343 */
... ... @@ -346,7 +346,7 @@
346 346  
347 347 //---------------rajout 8/1
348 348  
349   -int PutAmpWord(int fd, int f_dds, double amplitude)
  349 +int putAmpWord(int fd, int f_dds, double amplitude)
350 350 {
351 351 uint16_t PhaseWord = 0x0000;
352 352 uint16_t AmpWord = 0x0000;
353 353  
354 354  
... ... @@ -354,18 +354,18 @@
354 354  
355 355 AmpWord = rint(amplitude*(pow(2.0,12.0)-1)/100);
356 356  
357   - read_register(fd,0x0c,&ReadPhaseAmpWord);
  357 + readRegister(fd,0x0c,&ReadPhaseAmpWord);
358 358  
359 359 PhaseWord = ReadPhaseAmpWord&0xFFFF;
360 360  
361   - write_register(fd,0x0c,AmpWord>>8&0xFF,AmpWord&0xFF,PhaseWord>>8&0xFF,PhaseWord&0xFF);
362   - Send_IO_Update(f_dds);
  361 + writeRegister(fd,0x0c,AmpWord>>8&0xFF,AmpWord&0xFF,PhaseWord>>8&0xFF,PhaseWord&0xFF);
  362 + sendIOUpdate(f_dds);
363 363  
364 364 return 0;
365 365 }
366 366  
367 367  
368   -int PutPhaseWord(int fd, int f_dds, double phase)
  368 +int putPhaseWord(int fd, int f_dds, double phase)
369 369 {
370 370 uint16_t PhaseWord = 0x0000;
371 371 uint16_t AmpWord = 0x0000;
372 372  
373 373  
374 374  
375 375  
376 376  
377 377  
378 378  
379 379  
380 380  
381 381  
... ... @@ -373,63 +373,63 @@
373 373  
374 374 PhaseWord = rint(phase*(pow(2.0,16.0)-1)/360);
375 375  
376   - read_register(fd,0x0c,&ReadPhaseAmpWord);
  376 + readRegister(fd,0x0c,&ReadPhaseAmpWord);
377 377  
378 378 AmpWord = ReadPhaseAmpWord>>16&0xFFFF;
379 379  
380   - write_register(fd,0x0c,AmpWord>>8&0xFF,AmpWord&0xFF,PhaseWord>>8&0xFF,PhaseWord&0xFF);
381   - Send_IO_Update(f_dds);
  380 + writeRegister(fd,0x0c,AmpWord>>8&0xFF,AmpWord&0xFF,PhaseWord>>8&0xFF,PhaseWord&0xFF);
  381 + sendIOUpdate(f_dds);
382 382  
383 383 return 0;
384 384 }
385 385  
386   -int PutFrequencyWord(int fd, int f_dds, double fout)//Attention uniquement valable pour fclk = 1 GHz
  386 +int putFrequencyWord(int fd, int f_dds, double fclk,double fout)//Attention uniquement valable pour fclk = 1 GHz
387 387 {
388 388  
389 389 uint32_t FTWR = 0x00000000;
390   - FTWR = rint((fout/1e9)*pow(2.0,32.0));
391   - write_register(fd,0x0b,FTWR>>24&0xFF,FTWR>>16&0xFF,FTWR>>8&0xFF,FTWR&0xFF);//mot de frequence
392   - Send_IO_Update(f_dds);
  390 + FTWR = rint((fout/fclk)*pow(2.0,32.0));
  391 + writeRegister(fd,0x0b,FTWR>>24&0xFF,FTWR>>16&0xFF,FTWR>>8&0xFF,FTWR&0xFF);//mot de frequence
  392 + sendIOUpdate(f_dds);
393 393  
394 394 return 0;
395 395 }
396 396  
397 397  
398   -int PutFrequencyAmpPhaseWord(int fd, int f_dds, double fout, double fclk,double amp, double phase)//n'existe pas dans le mode profile enable
  398 +int putFrequencyAmpPhaseWord(int fd, int f_dds, double fout, double fclk,double amp, double phase)//n'existe pas dans le mode profile enable
399 399 {
400 400  
401 401 uint32_t FTWR = 0x00000000;
402 402  
403 403 FTWR = rint((fout/fclk)*pow(2.0,32.0));
404 404  
405   - write_register(fd,0x0b,FTWR>>24&0xFF,FTWR>>16&0xFF,FTWR>>8&0xFF,FTWR&0xFF);//mot de frequence
  405 + writeRegister(fd,0x0b,FTWR>>24&0xFF,FTWR>>16&0xFF,FTWR>>8&0xFF,FTWR&0xFF);//mot de frequence
406 406  
407   - Send_IO_Update(f_dds);
  407 + sendIOUpdate(f_dds);
408 408  
409   -// write_register(fd,0x0c,0x0F,0xFF,0x00,0x00); //mot de amp et de phase : amp max, phase nulle
410   -// Send_IO_Update(f_dds);
  409 +// writeRegister(fd,0x0c,0x0F,0xFF,0x00,0x00); //mot de amp et de phase : amp max, phase nulle
  410 +// sendIOUpdate(f_dds);
411 411  
412   - PutPhaseWord(fd,f_dds,phase);
413   - PutAmpWord(fd,f_dds,amp);
  412 + putPhaseWord(fd,f_dds,phase);
  413 + putAmpWord(fd,f_dds,amp);
414 414  
415 415 return 0;
416 416 }
417 417  
418 418  
419   -int InitialisationProfile (int fd,int f_dds)
  419 +int initialisationProfileMode (int fd,int f_dds)
420 420 {
421 421  
422   - Send_Reset(f_dds); //les registres sont maintenant par defaut
423   - write_register(fd,0x00,0x00,0x01,0x01,0x0a); //OSK+SDIO input only//ok
424   - Send_IO_Update(f_dds);
425   - write_register(fd,0x01,0x00,0x80,0x09,0x00); // profile mode enable very important
426   - Send_IO_Update(f_dds);
427   - write_register(fd,0x02,0x00,0x00,0x19,0x1c); // default
428   - Send_IO_Update(f_dds);
429   - write_register(fd,0x03,0x01,0x05,0x21,0x20); // calibration 1/2 :enable
430   - Send_IO_Update(f_dds);
431   - write_register(fd,0x03,0x00,0x05,0x21,0x20); // calibration 2/2 :desenable
432   - Send_IO_Update(f_dds);
  422 + sendReset(f_dds); //les registres sont maintenant par defaut
  423 + writeRegister(fd,0x00,0x00,0x01,0x01,0x0a); //OSK+SDIO input only//ok
  424 + sendIOUpdate(f_dds);
  425 + writeRegister(fd,0x01,0x00,0x80,0x09,0x00); // profile mode enable very important
  426 + sendIOUpdate(f_dds);
  427 + writeRegister(fd,0x02,0x00,0x00,0x19,0x1c); // default
  428 + sendIOUpdate(f_dds);
  429 + writeRegister(fd,0x03,0x01,0x05,0x21,0x20); // calibration 1/2 :enable
  430 + sendIOUpdate(f_dds);
  431 + writeRegister(fd,0x03,0x00,0x05,0x21,0x20); // calibration 2/2 :desenable
  432 + sendIOUpdate(f_dds);
433 433  
434 434 return 0;
435 435 }
... ... @@ -444,7 +444,7 @@
444 444 //1-rampe de frequence
445 445  
446 446 //rampe simple de fréquence
447   -int FrequencySweep (int fd, int f_dds,double fclk,double dfUp, double dfDown, double FreqMax,double FreqMin, double DeltaTimeUp, double DeltaTimeDown)
  447 +int frequencySweep (int fd, int f_dds,double fclk,double dfUp, double dfDown, double FreqMax,double FreqMin, double DeltaTimeUp, double DeltaTimeDown)
448 448 {
449 449 //calcul de N => N=DeltaF/df = DeltaT/dt
450 450  
451 451  
... ... @@ -504,12 +504,12 @@
504 504  
505 505 //4.1 Limit register
506 506 uint32_t FTWRmin = rint((FreqMin/fclk)*pow(2.0,32.0));
507   - write_register(fd,0x04,FTWRmin>>24&0xFF,FTWRmin>>16&0xFF,FTWRmin>>8&0xFF,FTWRmin&0xFF);//mot de frequence
508   - Send_IO_Update(f_dds);
  507 + writeRegister(fd,0x04,FTWRmin>>24&0xFF,FTWRmin>>16&0xFF,FTWRmin>>8&0xFF,FTWRmin&0xFF);//mot de frequence
  508 + sendIOUpdate(f_dds);
509 509  
510 510 uint32_t FTWRmax = rint((FreqMax/fclk)*pow(2.0,32.0));
511   - write_register(fd,0x05,FTWRmax>>24&0xFF,FTWRmax>>16&0xFF,FTWRmax>>8&0xFF,FTWRmax&0xFF);//mot de frequence
512   - Send_IO_Update(f_dds);
  511 + writeRegister(fd,0x05,FTWRmax>>24&0xFF,FTWRmax>>16&0xFF,FTWRmax>>8&0xFF,FTWRmax&0xFF);//mot de frequence
  512 + sendIOUpdate(f_dds);
513 513  
514 514  
515 515 //4.2 dfUP et dfDown
... ... @@ -519,10 +519,10 @@
519 519 uint32_t Word_df_up = rint(df_up*pow(2.0,32.0)/fclk);
520 520 uint32_t Word_df_down = rint(df_down*pow(2.0,32.0)/fclk);
521 521  
522   - write_register(fd,0x06,Word_df_up>>24&0xFF,Word_df_up>>16&0xFF,Word_df_up>>8&0xFF,Word_df_up&0xFF); //df_up
523   - Send_IO_Update(f_dds);
524   - write_register(fd,0x07,Word_df_down>>24&0xFF,Word_df_down>>16&0xFF,Word_df_down>>8&0xFF,Word_df_down&0xFF);//df_down
525   - Send_IO_Update(f_dds);
  522 + writeRegister(fd,0x06,Word_df_up>>24&0xFF,Word_df_up>>16&0xFF,Word_df_up>>8&0xFF,Word_df_up&0xFF); //df_up
  523 + sendIOUpdate(f_dds);
  524 + writeRegister(fd,0x07,Word_df_down>>24&0xFF,Word_df_down>>16&0xFF,Word_df_down>>8&0xFF,Word_df_down&0xFF);//df_down
  525 + sendIOUpdate(f_dds);
526 526  
527 527  
528 528 //4.3 dtUp et dtDown
529 529  
... ... @@ -533,13 +533,13 @@
533 533 Word_dt_up = rint(dtUp*fclk/24);
534 534 Word_dt_down = rint(dtDown*fclk/24);
535 535  
536   - write_register(fd,0x08,Word_dt_down>>8&0xFF,Word_dt_down&0xFF,Word_dt_up>>8&0xFF,Word_dt_up&0xFF); // il y a 2 dt
537   - Send_IO_Update(f_dds);
  536 + writeRegister(fd,0x08,Word_dt_down>>8&0xFF,Word_dt_down&0xFF,Word_dt_up>>8&0xFF,Word_dt_up&0xFF); // il y a 2 dt
  537 + sendIOUpdate(f_dds);
538 538  
539 539 //5 Start of the ramp
540 540  
541   - write_register(fd,0x01,0x00,0x08,0x09,0x00); //rampe simple
542   - Send_IO_Update(f_dds);
  541 + writeRegister(fd,0x01,0x00,0x08,0x09,0x00); //rampe simple
  542 + sendIOUpdate(f_dds);
543 543 return 0;
544 544  
545 545  
... ... @@ -550,7 +550,7 @@
550 550  
551 551  
552 552 //rampe continue de fréquence
553   -int ContinueFrequencySweep (int fd, int f_dds,double fclk,double dfUp, double dfDown, double FreqMax,double FreqMin, double DeltaTimeUp, double DeltaTimeDown)
  553 +int continueFrequencySweep (int fd, int f_dds,double fclk,double dfUp, double dfDown, double FreqMax,double FreqMin, double DeltaTimeUp, double DeltaTimeDown)
554 554 {
555 555 //calcul de N => N=DeltaF/df = DeltaT/dt
556 556  
557 557  
... ... @@ -610,12 +610,12 @@
610 610  
611 611 //4.1 Limit register
612 612 uint32_t FTWRmin = rint((FreqMin/fclk)*pow(2.0,32.0));
613   - write_register(fd,0x04,FTWRmin>>24&0xFF,FTWRmin>>16&0xFF,FTWRmin>>8&0xFF,FTWRmin&0xFF);//mot de frequence
614   - Send_IO_Update(f_dds);
  613 + writeRegister(fd,0x04,FTWRmin>>24&0xFF,FTWRmin>>16&0xFF,FTWRmin>>8&0xFF,FTWRmin&0xFF);//mot de frequence
  614 + sendIOUpdate(f_dds);
615 615  
616 616 uint32_t FTWRmax = rint((FreqMax/fclk)*pow(2.0,32.0));
617   - write_register(fd,0x05,FTWRmax>>24&0xFF,FTWRmax>>16&0xFF,FTWRmax>>8&0xFF,FTWRmax&0xFF);//mot de frequence
618   - Send_IO_Update(f_dds);
  617 + writeRegister(fd,0x05,FTWRmax>>24&0xFF,FTWRmax>>16&0xFF,FTWRmax>>8&0xFF,FTWRmax&0xFF);//mot de frequence
  618 + sendIOUpdate(f_dds);
619 619  
620 620  
621 621 //4.2 dfUP et dfDown
... ... @@ -625,10 +625,10 @@
625 625 uint32_t Word_df_up = rint(df_up*pow(2.0,32.0)/fclk);
626 626 uint32_t Word_df_down = rint(df_down*pow(2.0,32.0)/fclk);
627 627  
628   - write_register(fd,0x06,Word_df_up>>24&0xFF,Word_df_up>>16&0xFF,Word_df_up>>8&0xFF,Word_df_up&0xFF); //df_up
629   - Send_IO_Update(f_dds);
630   - write_register(fd,0x07,Word_df_down>>24&0xFF,Word_df_down>>16&0xFF,Word_df_down>>8&0xFF,Word_df_down&0xFF);//df_down
631   - Send_IO_Update(f_dds);
  628 + writeRegister(fd,0x06,Word_df_up>>24&0xFF,Word_df_up>>16&0xFF,Word_df_up>>8&0xFF,Word_df_up&0xFF); //df_up
  629 + sendIOUpdate(f_dds);
  630 + writeRegister(fd,0x07,Word_df_down>>24&0xFF,Word_df_down>>16&0xFF,Word_df_down>>8&0xFF,Word_df_down&0xFF);//df_down
  631 + sendIOUpdate(f_dds);
632 632  
633 633  
634 634 //4.3 dtUp et dtDown
635 635  
... ... @@ -639,13 +639,13 @@
639 639 Word_dt_up = rint(dtUp*fclk/24);
640 640 Word_dt_down = rint(dtDown*fclk/24);
641 641  
642   - write_register(fd,0x08,Word_dt_down>>8&0xFF,Word_dt_down&0xFF,Word_dt_up>>8&0xFF,Word_dt_up&0xFF); // il y a 2 dt
643   - Send_IO_Update(f_dds);
  642 + writeRegister(fd,0x08,Word_dt_down>>8&0xFF,Word_dt_down&0xFF,Word_dt_up>>8&0xFF,Word_dt_up&0xFF); // il y a 2 dt
  643 + sendIOUpdate(f_dds);
644 644  
645 645 //5 Start of the ramp
646 646  
647   - write_register(fd,0x01,0x00,0x8e,0x29,0x00); //rampe triangulaire
648   - Send_IO_Update(f_dds);
  647 + writeRegister(fd,0x01,0x00,0x8e,0x29,0x00); //rampe triangulaire
  648 + sendIOUpdate(f_dds);
649 649 return 0;
650 650  
651 651  
... ... @@ -656,7 +656,7 @@
656 656  
657 657 //2-rampe d'amplitude
658 658  
659   -int AmplitudeSweep (int fd, int f_dds,double fclk,double dAUp, double dADown, double AMax,double AMin, double DeltaTimeUp, double DeltaTimeDown)
  659 +int amplitudeSweep (int fd, int f_dds,double fclk,double dAUp, double dADown, double AMax,double AMin, double DeltaTimeUp, double DeltaTimeDown)
660 660 {
661 661  
662 662  
... ... @@ -742,10 +742,10 @@
742 742 uint32_t WordAmin = rint(AMin*4095/100);
743 743 uint32_t WordAmax= rint(AMax*4095/100);
744 744  
745   - write_register(fd,0x04,WordAmin>>24&0xFF,WordAmin>>16&0xFF,WordAmin>>8&0xFF,WordAmin&0xFF); //min => lim-(Amp ) = 0x800 = Amax/2
746   - Send_IO_Update(f_dds);
747   - write_register(fd,0x05,WordAmax>>24&0xFF,WordAmax>>16&0xFF,WordAmax>>8&0xFF,WordAmax&0xFF);//max => lim+(Amp) = 0xFFF= Amax0
748   - Send_IO_Update(f_dds);
  745 + writeRegister(fd,0x04,WordAmin>>24&0xFF,WordAmin>>16&0xFF,WordAmin>>8&0xFF,WordAmin&0xFF); //min => lim-(Amp ) = 0x800 = Amax/2
  746 + sendIOUpdate(f_dds);
  747 + writeRegister(fd,0x05,WordAmax>>24&0xFF,WordAmax>>16&0xFF,WordAmax>>8&0xFF,WordAmax&0xFF);//max => lim+(Amp) = 0xFFF= Amax0
  748 + sendIOUpdate(f_dds);
749 749  
750 750  
751 751 //4.2 dAUP et dADown
... ... @@ -753,10 +753,10 @@
753 753 uint32_t Word_dA_up = rint(dAUp*4095/100);
754 754 uint32_t Word_dA_down = rint(dADown*4095/100);
755 755  
756   - write_register(fd,0x06,Word_dA_up>>24&0xFF,Word_dA_up>>16&0xFF,Word_dA_up>>8&0xFF,Word_dA_up&0xFF); //dA_up
757   - Send_IO_Update(f_dds);
758   - write_register(fd,0x07,Word_dA_down>>24&0xFF,Word_dA_down>>16&0xFF,Word_dA_down>>8&0xFF,Word_dA_down&0xFF);//dA_down
759   - Send_IO_Update(f_dds);
  756 + writeRegister(fd,0x06,Word_dA_up>>24&0xFF,Word_dA_up>>16&0xFF,Word_dA_up>>8&0xFF,Word_dA_up&0xFF); //dA_up
  757 + sendIOUpdate(f_dds);
  758 + writeRegister(fd,0x07,Word_dA_down>>24&0xFF,Word_dA_down>>16&0xFF,Word_dA_down>>8&0xFF,Word_dA_down&0xFF);//dA_down
  759 + sendIOUpdate(f_dds);
760 760  
761 761  
762 762 //4.3 dtUp et dtDown
763 763  
764 764  
... ... @@ -764,19 +764,19 @@
764 764 uint16_t Word_dt_up = rint(dtUp*fclk/24);
765 765 uint16_t Word_dt_down = rint(dtDown*fclk/24);
766 766  
767   - write_register(fd,0x08,Word_dt_down>>8&0xFF,Word_dt_down&0xFF,Word_dt_up>>8&0xFF,Word_dt_up&0xFF); // il y a 2 dt
768   - Send_IO_Update(f_dds);
  767 + writeRegister(fd,0x08,Word_dt_down>>8&0xFF,Word_dt_down&0xFF,Word_dt_up>>8&0xFF,Word_dt_up&0xFF); // il y a 2 dt
  768 + sendIOUpdate(f_dds);
769 769  
770 770 //5 Start of the ramp
771 771  
772   - write_register(fd,0x01,0x00,0x28,0x09,0x00); //rampe simple montante
773   - //write_register(fd,0x01,0x00,0xAE,0x29,0x00); //rampe continue
774   - Send_IO_Update(f_dds);
  772 + writeRegister(fd,0x01,0x00,0x28,0x09,0x00); //rampe simple montante
  773 + //writeRegister(fd,0x01,0x00,0xAE,0x29,0x00); //rampe continue
  774 + sendIOUpdate(f_dds);
775 775  
776 776 return EXIT_SUCCESS;
777 777 }
778 778  
779   -int ContinueAmplitudeSweep (int fd, int f_dds,double fclk,double dAUp, double dADown, double AMax,double AMin, double DeltaTimeUp, double DeltaTimeDown)
  779 +int continueAmplitudeSweep (int fd, int f_dds,double fclk,double dAUp, double dADown, double AMax,double AMin, double DeltaTimeUp, double DeltaTimeDown)
780 780 {
781 781  
782 782  
... ... @@ -862,10 +862,10 @@
862 862 uint32_t WordAmin = rint(AMin*4095/100);
863 863 uint32_t WordAmax= rint(AMax*4095/100);
864 864  
865   - write_register(fd,0x04,WordAmin>>24&0xFF,WordAmin>>16&0xFF,WordAmin>>8&0xFF,WordAmin&0xFF); //min => lim-(Amp ) = 0x800 = Amax/2
866   - Send_IO_Update(f_dds);
867   - write_register(fd,0x05,WordAmax>>24&0xFF,WordAmax>>16&0xFF,WordAmax>>8&0xFF,WordAmax&0xFF);//max => lim+(Amp) = 0xFFF= Amax0
868   - Send_IO_Update(f_dds);
  865 + writeRegister(fd,0x04,WordAmin>>24&0xFF,WordAmin>>16&0xFF,WordAmin>>8&0xFF,WordAmin&0xFF); //min => lim-(Amp ) = 0x800 = Amax/2
  866 + sendIOUpdate(f_dds);
  867 + writeRegister(fd,0x05,WordAmax>>24&0xFF,WordAmax>>16&0xFF,WordAmax>>8&0xFF,WordAmax&0xFF);//max => lim+(Amp) = 0xFFF= Amax0
  868 + sendIOUpdate(f_dds);
869 869  
870 870  
871 871 //4.2 dAUP et dADown
... ... @@ -873,10 +873,10 @@
873 873 uint32_t Word_dA_up = rint(dAUp*4095/100);
874 874 uint32_t Word_dA_down = rint(dADown*4095/100);
875 875  
876   - write_register(fd,0x06,Word_dA_up>>24&0xFF,Word_dA_up>>16&0xFF,Word_dA_up>>8&0xFF,Word_dA_up&0xFF); //dA_up
877   - Send_IO_Update(f_dds);
878   - write_register(fd,0x07,Word_dA_down>>24&0xFF,Word_dA_down>>16&0xFF,Word_dA_down>>8&0xFF,Word_dA_down&0xFF);//dA_down
879   - Send_IO_Update(f_dds);
  876 + writeRegister(fd,0x06,Word_dA_up>>24&0xFF,Word_dA_up>>16&0xFF,Word_dA_up>>8&0xFF,Word_dA_up&0xFF); //dA_up
  877 + sendIOUpdate(f_dds);
  878 + writeRegister(fd,0x07,Word_dA_down>>24&0xFF,Word_dA_down>>16&0xFF,Word_dA_down>>8&0xFF,Word_dA_down&0xFF);//dA_down
  879 + sendIOUpdate(f_dds);
880 880  
881 881  
882 882 //4.3 dtUp et dtDown
883 883  
... ... @@ -884,14 +884,14 @@
884 884 uint16_t Word_dt_up = rint(dtUp*fclk/24);
885 885 uint16_t Word_dt_down = rint(dtDown*fclk/24);
886 886  
887   - write_register(fd,0x08,Word_dt_down>>8&0xFF,Word_dt_down&0xFF,Word_dt_up>>8&0xFF,Word_dt_up&0xFF); // il y a 2 dt
888   - Send_IO_Update(f_dds);
  887 + writeRegister(fd,0x08,Word_dt_down>>8&0xFF,Word_dt_down&0xFF,Word_dt_up>>8&0xFF,Word_dt_up&0xFF); // il y a 2 dt
  888 + sendIOUpdate(f_dds);
889 889  
890 890 //5 Start of the ramp
891 891  
892   - //write_register(fd,0x01,0x00,0x28,0x09,0x00); //rampe simple montante
893   - write_register(fd,0x01,0x00,0xAE,0x29,0x00); //rampe continue
894   - Send_IO_Update(f_dds);
  892 + //writeRegister(fd,0x01,0x00,0x28,0x09,0x00); //rampe simple montante
  893 + writeRegister(fd,0x01,0x00,0xAE,0x29,0x00); //rampe continue
  894 + sendIOUpdate(f_dds);
895 895  
896 896 return EXIT_SUCCESS;
897 897 }
... ... @@ -899,7 +899,7 @@
899 899  
900 900 //3-rampe de ĥase
901 901  
902   -int PhaseSweep (int fd, int f_dds,double fclk,double dphiUp, double dphiDown, double PhiMax,double PhiMin, double DeltaTimeUp, double DeltaTimeDown)
  902 +int phaseSweep (int fd, int f_dds,double fclk,double dphiUp, double dphiDown, double PhiMax,double PhiMin, double DeltaTimeUp, double DeltaTimeDown)
903 903 {
904 904  
905 905  
... ... @@ -995,10 +995,10 @@
995 995 printf("WordPhimax = %.32x\n",WordPhimax);
996 996  
997 997  
998   - write_register(fd,0x04,WordPhimin>>24&0xFF,WordPhimin>>16&0xFF,WordPhimin>>8&0xFF,WordPhimin&0xFF); //min => lim-(Amp ) = 0x800 = Amax/2
999   - Send_IO_Update(f_dds);
1000   - write_register(fd,0x05,WordPhimax>>24&0xFF,WordPhimax>>16&0xFF,WordPhimax>>8&0xFF,WordPhimax&0xFF);//max => lim+(Amp) = 0xFFF= Amax0
1001   - Send_IO_Update(f_dds);
  998 + writeRegister(fd,0x04,WordPhimin>>24&0xFF,WordPhimin>>16&0xFF,WordPhimin>>8&0xFF,WordPhimin&0xFF); //min => lim-(Amp ) = 0x800 = Amax/2
  999 + sendIOUpdate(f_dds);
  1000 + writeRegister(fd,0x05,WordPhimax>>24&0xFF,WordPhimax>>16&0xFF,WordPhimax>>8&0xFF,WordPhimax&0xFF);//max => lim+(Amp) = 0xFFF= Amax0
  1001 + sendIOUpdate(f_dds);
1002 1002  
1003 1003  
1004 1004 //4.2 dphiUP et dphiDown
1005 1005  
... ... @@ -1012,18 +1012,18 @@
1012 1012 printf("Word_dphi_down = %.32x\n",Word_dphi_down);
1013 1013  
1014 1014 /*
1015   - write_register(fd,0x06,Word_dphi_up>>16&0xFF,Word_dphi_up>>8&0xFF,Word_dphi_up>>0&0xFF,Word_dphi_up&0xFF); //dphi_up
1016   - Send_IO_Update(f_dds);
1017   - write_register(fd,0x07,Word_dphi_down>>16&0xFF,Word_dphi_down>>8&0xFF,Word_dphi_down>>0&0xFF,Word_dphi_down&0xFF);//dphi_down
1018   - Send_IO_Update(f_dds);
  1015 + writeRegister(fd,0x06,Word_dphi_up>>16&0xFF,Word_dphi_up>>8&0xFF,Word_dphi_up>>0&0xFF,Word_dphi_up&0xFF); //dphi_up
  1016 + sendIOUpdate(f_dds);
  1017 + writeRegister(fd,0x07,Word_dphi_down>>16&0xFF,Word_dphi_down>>8&0xFF,Word_dphi_down>>0&0xFF,Word_dphi_down&0xFF);//dphi_down
  1018 + sendIOUpdate(f_dds);
1019 1019  
1020 1020 */
1021 1021  
1022 1022  
1023   - write_register(fd,0x06,Word_dphi_up>>24&0xFF,Word_dphi_up>>16&0xFF,Word_dphi_up>>8&0xFF,Word_dphi_up&0xFF); //dA_up
1024   - Send_IO_Update(f_dds);
1025   - write_register(fd,0x07,Word_dphi_down>>24&0xFF,Word_dphi_down>>16&0xFF,Word_dphi_down>>8&0xFF,Word_dphi_down&0xFF);//dA_down
1026   - Send_IO_Update(f_dds);
  1023 + writeRegister(fd,0x06,Word_dphi_up>>24&0xFF,Word_dphi_up>>16&0xFF,Word_dphi_up>>8&0xFF,Word_dphi_up&0xFF); //dA_up
  1024 + sendIOUpdate(f_dds);
  1025 + writeRegister(fd,0x07,Word_dphi_down>>24&0xFF,Word_dphi_down>>16&0xFF,Word_dphi_down>>8&0xFF,Word_dphi_down&0xFF);//dA_down
  1026 + sendIOUpdate(f_dds);
1027 1027  
1028 1028  
1029 1029 //4.3 dtUp et dtDown
1030 1030  
1031 1031  
... ... @@ -1031,18 +1031,18 @@
1031 1031 uint16_t Word_dt_up = rint(dtUp*fclk/24);
1032 1032 uint16_t Word_dt_down = rint(dtDown*fclk/24);
1033 1033  
1034   - write_register(fd,0x08,Word_dt_down>>8&0xFF,Word_dt_down&0xFF,Word_dt_up>>8&0xFF,Word_dt_up&0xFF); // il y a 2 dt
1035   - Send_IO_Update(f_dds);
  1034 + writeRegister(fd,0x08,Word_dt_down>>8&0xFF,Word_dt_down&0xFF,Word_dt_up>>8&0xFF,Word_dt_up&0xFF); // il y a 2 dt
  1035 + sendIOUpdate(f_dds);
1036 1036  
1037 1037 //5 Start of the ramp
1038 1038  
1039   - write_register(fd,0x01,0x00,0x18,0x09,0x00); //rampe simple montante
1040   - Send_IO_Update(f_dds);
  1039 + writeRegister(fd,0x01,0x00,0x18,0x09,0x00); //rampe simple montante
  1040 + sendIOUpdate(f_dds);
1041 1041  
1042 1042 return EXIT_SUCCESS;
1043 1043 }
1044 1044  
1045   -int ContinuePhaseSweep (int fd, int f_dds,double fclk,double dphiUp, double dphiDown, double PhiMax,double PhiMin, double DeltaTimeUp, double DeltaTimeDown)
  1045 +int continuePhaseSweep (int fd, int f_dds,double fclk,double dphiUp, double dphiDown, double PhiMax,double PhiMin, double DeltaTimeUp, double DeltaTimeDown)
1046 1046 {
1047 1047  
1048 1048  
... ... @@ -1138,10 +1138,10 @@
1138 1138 printf("WordPhimax = %.32x\n",WordPhimax);
1139 1139  
1140 1140  
1141   - write_register(fd,0x04,WordPhimin>>24&0xFF,WordPhimin>>16&0xFF,WordPhimin>>8&0xFF,WordPhimin&0xFF); //min => lim-(Amp ) = 0x800 = Amax/2
1142   - Send_IO_Update(f_dds);
1143   - write_register(fd,0x05,WordPhimax>>24&0xFF,WordPhimax>>16&0xFF,WordPhimax>>8&0xFF,WordPhimax&0xFF);//max => lim+(Amp) = 0xFFF= Amax0
1144   - Send_IO_Update(f_dds);
  1141 + writeRegister(fd,0x04,WordPhimin>>24&0xFF,WordPhimin>>16&0xFF,WordPhimin>>8&0xFF,WordPhimin&0xFF); //min => lim-(Amp ) = 0x800 = Amax/2
  1142 + sendIOUpdate(f_dds);
  1143 + writeRegister(fd,0x05,WordPhimax>>24&0xFF,WordPhimax>>16&0xFF,WordPhimax>>8&0xFF,WordPhimax&0xFF);//max => lim+(Amp) = 0xFFF= Amax0
  1144 + sendIOUpdate(f_dds);
1145 1145  
1146 1146  
1147 1147 //4.2 dphiUP et dphiDown
1148 1148  
... ... @@ -1155,18 +1155,18 @@
1155 1155 printf("Word_dphi_down = %.32x\n",Word_dphi_down);
1156 1156  
1157 1157 /*
1158   - write_register(fd,0x06,Word_dphi_up>>16&0xFF,Word_dphi_up>>8&0xFF,Word_dphi_up>>0&0xFF,Word_dphi_up&0xFF); //dphi_up
1159   - Send_IO_Update(f_dds);
1160   - write_register(fd,0x07,Word_dphi_down>>16&0xFF,Word_dphi_down>>8&0xFF,Word_dphi_down>>0&0xFF,Word_dphi_down&0xFF);//dphi_down
1161   - Send_IO_Update(f_dds);
  1158 + writeRegister(fd,0x06,Word_dphi_up>>16&0xFF,Word_dphi_up>>8&0xFF,Word_dphi_up>>0&0xFF,Word_dphi_up&0xFF); //dphi_up
  1159 + sendIOUpdate(f_dds);
  1160 + writeRegister(fd,0x07,Word_dphi_down>>16&0xFF,Word_dphi_down>>8&0xFF,Word_dphi_down>>0&0xFF,Word_dphi_down&0xFF);//dphi_down
  1161 + sendIOUpdate(f_dds);
1162 1162  
1163 1163 */
1164 1164  
1165 1165  
1166   - write_register(fd,0x06,Word_dphi_up>>24&0xFF,Word_dphi_up>>16&0xFF,Word_dphi_up>>8&0xFF,Word_dphi_up&0xFF); //dA_up
1167   - Send_IO_Update(f_dds);
1168   - write_register(fd,0x07,Word_dphi_down>>24&0xFF,Word_dphi_down>>16&0xFF,Word_dphi_down>>8&0xFF,Word_dphi_down&0xFF);//dA_down
1169   - Send_IO_Update(f_dds);
  1166 + writeRegister(fd,0x06,Word_dphi_up>>24&0xFF,Word_dphi_up>>16&0xFF,Word_dphi_up>>8&0xFF,Word_dphi_up&0xFF); //dA_up
  1167 + sendIOUpdate(f_dds);
  1168 + writeRegister(fd,0x07,Word_dphi_down>>24&0xFF,Word_dphi_down>>16&0xFF,Word_dphi_down>>8&0xFF,Word_dphi_down&0xFF);//dA_down
  1169 + sendIOUpdate(f_dds);
1170 1170  
1171 1171  
1172 1172 //4.3 dtUp et dtDown
1173 1173  
... ... @@ -1174,13 +1174,13 @@
1174 1174 uint16_t Word_dt_up = rint(dtUp*fclk/24);
1175 1175 uint16_t Word_dt_down = rint(dtDown*fclk/24);
1176 1176  
1177   - write_register(fd,0x08,Word_dt_down>>8&0xFF,Word_dt_down&0xFF,Word_dt_up>>8&0xFF,Word_dt_up&0xFF); // il y a 2 dt
1178   - Send_IO_Update(f_dds);
  1177 + writeRegister(fd,0x08,Word_dt_down>>8&0xFF,Word_dt_down&0xFF,Word_dt_up>>8&0xFF,Word_dt_up&0xFF); // il y a 2 dt
  1178 + sendIOUpdate(f_dds);
1179 1179  
1180 1180 //5 Start of the ramp
1181 1181  
1182   - write_register(fd,0x01,0x00,0x9E,0x29,0x00); //rampe simple montante
1183   - Send_IO_Update(f_dds);
  1182 + writeRegister(fd,0x01,0x00,0x9E,0x29,0x00); //rampe simple montante
  1183 + sendIOUpdate(f_dds);
1184 1184  
1185 1185 return EXIT_SUCCESS;
1186 1186 }
... ... @@ -1190,7 +1190,7 @@
1190 1190  
1191 1191 //--------------------------FONCTIONS RAMPES SOFTWARES
1192 1192  
1193   -int RampAmpFromSoft(int fd, int f_dds,double DeltaTimeUp,double AIni, double AFin)
  1193 +int rampAmpFromSoft(int fd, int f_dds,double DeltaTimeUp,double AIni, double AFin)
1194 1194 {
1195 1195  
1196 1196 //On va plutôt fixé dA sinon trop de contrainte : => Besoin d'allocation dynamique
... ... @@ -1220,7 +1220,7 @@
1220 1220 //extraction de la phase initiale et de l'amplitude
1221 1221  
1222 1222 uint32_t ReadPhaseAmpWord = 0x00000000;
1223   - read_register(fd, 0x0c,&ReadPhaseAmpWord);
  1223 + readRegister(fd, 0x0c,&ReadPhaseAmpWord);
1224 1224 printf("ReadPhaseAmpWord = %.8x \n", ReadPhaseAmpWord);
1225 1225  
1226 1226 uint16_t WordPhaseInitiale = ReadPhaseAmpWord&0xFFFF;
... ... @@ -1240,8 +1240,8 @@
1240 1240 printf("Start of the ramp\n");
1241 1241 for(int i=0;i<NumberPoints;i++)
1242 1242 {
1243   - write_register(fd,0x0c,ArrayWordAmp[i]>>8&0xFF,ArrayWordAmp[i]&0xFF,WordPhaseInitiale>>8&0xFF,WordPhaseInitiale&0xFF);
1244   - Send_IO_Update(f_dds);
  1243 + writeRegister(fd,0x0c,ArrayWordAmp[i]>>8&0xFF,ArrayWordAmp[i]&0xFF,WordPhaseInitiale>>8&0xFF,WordPhaseInitiale&0xFF);
  1244 + sendIOUpdate(f_dds);
1245 1245 usleep(1000000*dt);
1246 1246 }
1247 1247  
1248 1248  
... ... @@ -1254,11 +1254,11 @@
1254 1254  
1255 1255 AmpWord = rint(amplitude*(pow(2.0,12.0)-1)/100);
1256 1256  
1257   - read_register(fd,0x0c,&ReadPhaseAmpWord);
  1257 + readRegister(fd,0x0c,&ReadPhaseAmpWord);
1258 1258  
1259 1259 PhaseWord = ReadPhaseAmpWord&0xFFFF;
1260 1260  
1261   - write_register(fd,0x0c,AmpWord>>8&0xFF,AmpWord&0xFF,PhaseWord>>8&0xFF,PhaseWord&0xFF);
  1261 + writeRegister(fd,0x0c,AmpWord>>8&0xFF,AmpWord&0xFF,PhaseWord>>8&0xFF,PhaseWord&0xFF);
1262 1262  
1263 1263 */
1264 1264  
... ... @@ -1289,7 +1289,7 @@
1289 1289 //extraction de la phase initiale et de l'amplitude
1290 1290  
1291 1291 uint32_t ReadPhaseAmpWord = 0x00000000;
1292   - read_register(fd, 0x0c,&ReadPhaseAmpWord);
  1292 + readRegister(fd, 0x0c,&ReadPhaseAmpWord);
1293 1293 printf("ReadPhaseAmpWord = %.8x \n", ReadPhaseAmpWord);
1294 1294  
1295 1295 uint16_t WordPhaseInitiale = ReadPhaseAmpWord&0xFFFF;
... ... @@ -1313,7 +1313,7 @@
1313 1313 return EXIT_SUCCESS;
1314 1314 }
1315 1315  
1316   -int RampPhaseFromSoft(int fd, int f_dds,double DeltaTimeUp,double PhiIni, double PhiFin)
  1316 +int rampPhaseFromSoft(int fd, int f_dds,double DeltaTimeUp,double PhiIni, double PhiFin)
1317 1317 {
1318 1318  
1319 1319 //On va plutôt fixé dphi : => Besoin d'allocation dynamique
... ... @@ -1343,7 +1343,7 @@
1343 1343 //extraction de l'amplitude
1344 1344  
1345 1345 uint32_t ReadPhaseAmpWord = 0x00000000;
1346   - read_register(fd, 0x0c,&ReadPhaseAmpWord);
  1346 + readRegister(fd, 0x0c,&ReadPhaseAmpWord);
1347 1347 printf("ReadPhaseAmpWord = %.8x \n", ReadPhaseAmpWord);
1348 1348  
1349 1349 uint16_t WordAmpInitiale = ReadPhaseAmpWord>>16&0xFFFF;
... ... @@ -1361,8 +1361,8 @@
1361 1361 printf("Start of the ramp\n");
1362 1362 for(int i=0;i<NumberPoints;i++)
1363 1363 {
1364   - write_register(fd,0x0c,WordAmpInitiale>>8&0xFF,WordAmpInitiale&0xFF,ArrayWordPhi[i]>>8&0xFF,ArrayWordPhi[i]&0xFF);
1365   - Send_IO_Update(f_dds);
  1364 + writeRegister(fd,0x0c,WordAmpInitiale>>8&0xFF,WordAmpInitiale&0xFF,ArrayWordPhi[i]>>8&0xFF,ArrayWordPhi[i]&0xFF);
  1365 + sendIOUpdate(f_dds);
1366 1366 usleep(1000000*dt);
1367 1367 }
1368 1368